{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,13]],"date-time":"2026-06-13T16:05:11Z","timestamp":1781366711835,"version":"3.54.1"},"reference-count":50,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2015,6,1]],"date-time":"2015-06-01T00:00:00Z","timestamp":1433116800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/OAPA.html"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61173038"],"award-info":[{"award-number":["61173038"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61228204"],"award-info":[{"award-number":["61228204"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"scholarship from China Scholarship Council","award":["201306130042"],"award-info":[{"award-number":["201306130042"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans.Inform.Forensic Secur."],"published-print":{"date-parts":[[2015,6]]},"DOI":"10.1109\/tifs.2015.2400413","type":"journal-article","created":{"date-parts":[[2015,2,5]],"date-time":"2015-02-05T19:40:31Z","timestamp":1423165231000},"page":"1137-1150","source":"Crossref","is-referenced-by-count":124,"title":["A PUF-FSM Binding Scheme for FPGA IP Protection and Pay-Per-Device Licensing"],"prefix":"10.1109","volume":"10","author":[{"family":"Jiliang Zhang","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Yaping Lin","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Yongqiang Lyu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Gang Qu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-014-1458-1"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378568"},{"key":"ref33","author":"qu","year":"2003","journal-title":"Intellectual Property Protection in VLSI Designs Theory and Practice"},{"key":"ref32","doi-asserted-by":"crossref","first-page":"776","DOI":"10.1145\/277044.277240","article-title":"Watermarking techniques for intellectual property protection","author":"kahng","year":"1998","journal-title":"Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC"},{"key":"ref31","first-page":"165","article-title":"GenFSM: A finite state machine generation tool","author":"pruteanu","year":"2008","journal-title":"Proc Int Conf Develop Appl Syst"},{"key":"ref30","author":"pruteanu","year":"2000","journal-title":"Kiss to Verilog FSM Converter"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2013.6645555"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/2699833"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1587\/elex.9.1735"},{"key":"ref34","first-page":"764","article-title":"Watermarking FPGA bitfile for intellectual property protection","volume":"21","author":"zhang","year":"2012","journal-title":"Radioengineering"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2010.2098131"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2163307"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.212"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2169667"},{"key":"ref1","article-title":"Security for volatile FPGAs","author":"drimer","year":"2009"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/1403375.1403631"},{"key":"ref22","article-title":"Automated design, implementation, and evaluation of arbiter-based PUF on FPGA using programmable delay lines","author":"majzoobi","year":"2014"},{"key":"ref21","first-page":"302","article-title":"PUFKY: A fully functional PUF-based cryptographic key generator","author":"maes","year":"2012","journal-title":"Proc 8th Int Conf Cryptogr Hardw Embedded Syst (CHES)"},{"key":"ref24","first-page":"291","article-title":"Active hardware metering for intellectual property protection and security","author":"alkabani","year":"2007","journal-title":"Proc 16th USENIX Security Symp"},{"key":"ref23","author":"hennessy","year":"2006","journal-title":"Computer Architecture A Quantitative Approach"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/1450095.1450129"},{"key":"ref25","first-page":"674","article-title":"Remote activation of ICs for piracy prevention and digital right management","author":"alkabani","year":"2007","journal-title":"Proc IEEE\/ACM Int Conf Comput -Aided Design (ICCAD)"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2014.6855586"},{"key":"ref10","doi-asserted-by":"crossref","first-page":"9","DOI":"10.1145\/1278480.1278484","article-title":"physical unclonable functions for device authentication and secret key generation","author":"suh","year":"2007","journal-title":"2007 44th ACM\/IEEE Design Automation Conference DAC"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2010.2068303"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2010.25"},{"key":"ref12","article-title":"Anti-tamper method for field programmable gate arrays through dynamic reconfiguration and decoy circuits","author":"stone","year":"2008"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272250"},{"key":"ref14","first-page":"237","article-title":"Modeling attacks on physical unclonable functions","author":"r\u00fchrmair","year":"2010","journal-title":"Proc 17th ACM Conf Comput Commun Secur (CCS)"},{"key":"ref15","first-page":"837","article-title":"Robust techniques for watermarking sequential circuit designs","author":"oliveira","year":"1999","journal-title":"Proc 36th Annu ACM\/IEEE Design Autom Conf (DAC)"},{"key":"ref16","first-page":"311","article-title":"Offline hardware\/software authentication for reconfigurable platforms","author":"simpson","year":"2006","journal-title":"Proc 8th Int Conf Cryptogr Hardw Embedded Syst (CHES)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2131133"},{"key":"ref18","first-page":"63","article-title":"FPGA intrinsic PUFs and their use for IP protection","author":"guajardo","year":"2007","journal-title":"Proc 9th Int Workshop Cryptograph Hardw Embed Syst (CHES)"},{"key":"ref19","article-title":"Security solutions using Spartan-3 generation FPGAs (v1.1)","year":"2008"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2007.4439246"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/503062.503065"},{"key":"ref6","article-title":"Design security in Stratix III devices (v1.5)","year":"2009"},{"key":"ref5","author":"drimer","year":"2008","journal-title":"Protecting Multiple Cores in a Single FPGA Design"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1950413.1950432"},{"key":"ref7","article-title":"Using high security features in Virtex-II series FPGAs (v1.0)","year":"2004"},{"key":"ref49","first-page":"1","article-title":"ARO-PUF: An aging-resistant ring oscillator PUF design","author":"rahman","year":"2014","journal-title":"Proc Design Autom Test Eur Conf Exhibition (DATE)"},{"key":"ref9","article-title":"Protecting the FPGA design from common threats (v1.0)","year":"2009"},{"key":"ref46","first-page":"36","article-title":"Temperature-aware cooperative ring oscillator PUF","author":"qu","year":"2009","journal-title":"Proc IEEE Int Workshop Hardw -Oriented Secur Trust (HOST)"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/SPW.2012.30"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783360"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2011.35"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-14452-3_1"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2010.5419927"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2011.5955010"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2007.4380646"}],"container-title":["IEEE Transactions on Information Forensics and Security"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/10206\/7084215\/07031902.pdf?arnumber=7031902","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T02:35:36Z","timestamp":1633919736000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7031902\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,6]]},"references-count":50,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tifs.2015.2400413","relation":{},"ISSN":["1556-6013","1556-6021"],"issn-type":[{"value":"1556-6013","type":"print"},{"value":"1556-6021","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,6]]}}}