{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,24]],"date-time":"2026-03-24T15:43:03Z","timestamp":1774366983443,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2015,2,1]],"date-time":"2015-02-01T00:00:00Z","timestamp":1422748800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Ind. Inf."],"published-print":{"date-parts":[[2015,2]]},"DOI":"10.1109\/tii.2014.2370532","type":"journal-article","created":{"date-parts":[[2014,11,13]],"date-time":"2014-11-13T19:53:05Z","timestamp":1415908385000},"page":"94-103","source":"Crossref","is-referenced-by-count":31,"title":["New Techniques and Tools for Application-Dependent Testing of FPGA-Based Components"],"prefix":"10.1109","volume":"11","author":[{"given":"Alessandro","family":"Cilardo","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref31","first-page":"279","article-title":"BIST-BASED Group Testing for Diagnosis of Embedded FPGA Cores","author":"sarvi","year":"2008","journal-title":"ESA"},{"key":"ref30","article-title":"Virtex-5 FPGA XtremeDSP Design Considerations","year":"2008"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2009.2039938"},{"key":"ref11","article-title":"Design assurance guidance for airborne electronic hardware","year":"2000"},{"key":"ref12","article-title":"Functional safety of electrical\/electronic\/programmable electronic safety-related systems","year":"2010"},{"key":"ref13","article-title":"Road vehicles—Functional safety","year":"2011"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2013.2266098"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2012.2220974"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2012.2232300"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2010.2050291"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2013.2273476"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/AUTEST.2000.885628"},{"key":"ref28","author":"yang","year":"1991","journal-title":"Logic Synthesis and Optimization Benchmarks User Guide Version 3 0 Citeseer"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2011.247"},{"key":"ref27","author":"stroud","year":"2002","journal-title":"A Designer's Guide to Built-In Self-Test"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2013.2270011"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884053"},{"key":"ref29","article-title":"SIS: A system for sequential circuit synthesis","author":"sentovich","year":"1992"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2012.0117"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.1999.745159"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882503"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIE.2007.898279"},{"key":"ref9","year":"2014"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TII.2011.2123908"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.1999.810777"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.1998.743180"},{"key":"ref21","first-page":"795","article-title":"Novel technique for built-in self-test of FPGA interconnects","author":"sun","year":"0","journal-title":"Proc IEEE Int Test Conf"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2004.1299239"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2001.966716"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/775999.776003"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1023\/B:JETT.0000029461.92122.e0"}],"container-title":["IEEE Transactions on Industrial Informatics"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/9424\/7027294\/06955816.pdf?arnumber=6955816","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:41:33Z","timestamp":1642005693000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6955816\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,2]]},"references-count":31,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tii.2014.2370532","relation":{},"ISSN":["1551-3203","1941-0050"],"issn-type":[{"value":"1551-3203","type":"print"},{"value":"1941-0050","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,2]]}}}