{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,19]],"date-time":"2026-09-19T20:11:10Z","timestamp":1789848670411,"version":"4.0.1"},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2010,5,1]],"date-time":"2010-05-01T00:00:00Z","timestamp":1272672000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Instrum. Meas."],"published-print":{"date-parts":[[2010,5]]},"DOI":"10.1109\/tim.2010.2044710","type":"journal-article","created":{"date-parts":[[2010,3,26]],"date-time":"2010-03-26T19:25:00Z","timestamp":1269631500000},"page":"1127-1133","source":"Crossref","is-referenced-by-count":59,"title":["Standby Leakage Power Reduction Technique for Nanoscale CMOS VLSI Systems"],"prefix":"10.1109","volume":"59","author":[{"family":"HeungJun Jeon","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Yong-Bin Kim","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"family":"Minsu Choi","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","author":"razavi","year":"2001","journal-title":"Design of Analog CMOS Integrated Circuits"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/16.141236"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2008.2002350"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/16.57140"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.111"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1007\/0-387-28133-9_2"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2007958"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/IMTC.2009.5168670"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609253"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/5.915374"},{"key":"ref6","first-page":"116","article-title":"optimal body bias selection for leakage improvement and process compensation over different technology generations","author":"neau","year":"2003","journal-title":"Proc ISLEP"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TDMR.2008.922223"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870796"},{"key":"ref7","first-page":"786","article-title":"adaptive body bias for reducing impacts of die-to-die and within-die parameter variations on microprocessor frequency and leakage","author":"tschanz","year":"2002","journal-title":"Proc ISSCC"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1147\/rd.504.0363"},{"key":"ref1","year":"0","journal-title":"ITRS"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.808156"}],"container-title":["IEEE Transactions on Instrumentation and Measurement"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/19\/5443470\/05438756.pdf?arnumber=5438756","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T01:00:51Z","timestamp":1633914051000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5438756\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,5]]},"references-count":17,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tim.2010.2044710","relation":{},"ISSN":["0018-9456","1557-9662"],"issn-type":[{"value":"0018-9456","type":"print"},{"value":"1557-9662","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,5]]}}}