{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,14]],"date-time":"2026-02-14T10:26:16Z","timestamp":1771064776543,"version":"3.50.1"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2011,6,1]],"date-time":"2011-06-01T00:00:00Z","timestamp":1306886400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Instrum. Meas."],"published-print":{"date-parts":[[2011,6]]},"DOI":"10.1109\/tim.2011.2115390","type":"journal-article","created":{"date-parts":[[2011,3,29]],"date-time":"2011-03-29T19:43:44Z","timestamp":1301427824000},"page":"2070-2079","source":"Crossref","is-referenced-by-count":36,"title":["A High-Resolution Time-to-Digital Converter on FPGA Using Dynamic Reconfiguration"],"prefix":"10.1109","volume":"60","author":[{"given":"Marc-Andre","family":"Daigneault","sequence":"first","affiliation":[]},{"given":"Jean Pierre","family":"David","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"460","article-title":"A low power wide range duty cycle corrector based on pulse shrinking\/stretching mechanism","author":"chen","year":"2007","journal-title":"Proc IEEE ASSCC"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TENCON.2006.343706"},{"key":"ref12","first-page":"177","article-title":"Firmware-only implementation of time-to-digital converter (TDC) in field-programmable gate array (FPGA)","author":"wu","year":"2003","journal-title":"Proc IEEE Symp Nuclear Science"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2006.869820"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/NSSMIC.2008.4775079"},{"key":"ref15","doi-asserted-by":"crossref","first-page":"113","DOI":"10.1145\/1508128.1508145","article-title":"A 17 ps time-to-digital converter implemented in 65 nm FPGA technology","author":"favi","year":"2009","journal-title":"Proc ACM Int Symp Field Programmable Gate Arrays"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2007.7"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2008.2005080"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/19.552156"},{"key":"ref19","first-page":"209","article-title":"A FPGA Vernier digital-to-time converter with 3.56 ps resolution and <ref_formula><tex Notation=\"TeX\">$-0.23 \\sim +0.2\\ \\hbox{LSB}$<\/tex><\/ref_formula> inaccuracy","author":"chen","year":"2008","journal-title":"Proc IEEE CICC"},{"key":"ref4","first-page":"1","year":"2009","journal-title":"Agilent U1050A Acquiris Time-to-Digital Converter"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2007.903183"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917405"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.902207"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.874281"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.817263"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2008.2005857"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/RWS.2008.4463454"},{"key":"ref1","first-page":"761","article-title":"TDC module for time-of-flight","author":"jin","year":"2007","journal-title":"IEEE Nucl Sci Symp Conf Rec"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1016\/j.measurement.2003.12.001"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1088\/0957-0233\/20\/2\/025108"},{"key":"ref21","first-page":"580","article-title":"High-precision TDC in an FPGA using 192 MHz quadrature clock","author":"fries","year":"2002","journal-title":"Proc IEEE Nucl Sci Symp"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2008.4606372"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1088\/0026-1394\/41\/1\/004"},{"key":"ref26","year":"2004","journal-title":"Two flows for partial reconfiguration module based or difference based"},{"key":"ref25","first-page":"595","article-title":"Design of an on-chip random number generator using metastability","author":"kinniment","year":"2002","journal-title":"Proc 28th ESSCIRC"}],"container-title":["IEEE Transactions on Instrumentation and Measurement"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/19\/5765517\/05738332.pdf?arnumber=5738332","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,20]],"date-time":"2021-11-20T21:23:26Z","timestamp":1637443406000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5738332\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,6]]},"references-count":26,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tim.2011.2115390","relation":{},"ISSN":["0018-9456","1557-9662"],"issn-type":[{"value":"0018-9456","type":"print"},{"value":"1557-9662","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,6]]}}}