{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,17]],"date-time":"2025-12-17T12:53:05Z","timestamp":1765975985043},"reference-count":27,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2013,10,1]],"date-time":"2013-10-01T00:00:00Z","timestamp":1380585600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Instrum. Meas."],"published-print":{"date-parts":[[2013,10]]},"DOI":"10.1109\/tim.2013.2259754","type":"journal-article","created":{"date-parts":[[2013,6,10]],"date-time":"2013-06-10T18:02:01Z","timestamp":1370887321000},"page":"2716-2724","source":"Crossref","is-referenced-by-count":14,"title":["Evaluation of Correlation Power Analysis Resistance and Its Application on Asymmetric Mask Protected Data Encryption Standard Hardware"],"prefix":"10.1109","volume":"62","author":[{"given":"Weiwei","family":"Shan","sequence":"first","affiliation":[]},{"given":"Xin","family":"Chen","sequence":"additional","affiliation":[]},{"given":"Bo","family":"Li","sequence":"additional","affiliation":[]},{"given":"Peng","family":"Cao","sequence":"additional","affiliation":[]},{"given":"Jie","family":"Li","sequence":"additional","affiliation":[]},{"given":"Gugang","family":"Gao","sequence":"additional","affiliation":[]},{"given":"Longxing","family":"Shi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2007.900146"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/19.963181"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/IMTC.2010.5488049"},{"key":"ref13","first-page":"35","article-title":"Power-analysis attacks on an FPGA?First experimental results","author":"ors","year":"2003","journal-title":"Proc Workshop Cryptographic Hardware Embedded Syst"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2012.2200399"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1268856"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.4028\/www.scientific.net\/AMM.121-126.867"},{"key":"ref17","first-page":"121","article-title":"A power analysis resistant DES cryptographic algorithm and its hardware design","author":"li","year":"2012","journal-title":"Proc 3rd Int Conf Digit Manuf Autom"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.104"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ICSAMOS.2007.4285753"},{"key":"ref4","first-page":"388","article-title":"Differential power analysis","author":"kocher","year":"1999","journal-title":"Proc 19th Annu Int Cryptol Conf"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1049\/el:20040385"},{"key":"ref3","first-page":"1","article-title":"Implementation of symmetric cryptography in embedded systems for secure measurement systemsx","author":"bilski","year":"2011","journal-title":"Proc IEEE Instrum Meas Technol Conf (I2MTC)"},{"key":"ref6","author":"mangard","year":"2007","journal-title":"Power Analysis Attacks"},{"key":"ref5","first-page":"16","article-title":"Correlation power analysis with a leakage model","author":"brier","year":"2004","journal-title":"Proc Cryptographic Hardware and Embedded Systems?CHES 99"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2006.880311"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2007.894919"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1016\/j.measurement.2010.03.002"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2007.900132"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IMTC.2010.5488137"},{"key":"ref20","year":"2011","journal-title":"PrimeTime\ufffdP X User Guide Version E-2010 12"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ICIT.2010.5472570"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ICSCS.2009.5412604"},{"key":"ref24","first-page":"1","article-title":"Overview of dual rail with precharge logic styles to thwart implementation-level attacks on hardware cryptoprocessors: New attacks and improved counter-measures","author":"danger","year":"2009","journal-title":"Proc Workshop Secure Control Systems (SCS)"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-28632-5_21"},{"key":"ref26","first-page":"309","article-title":"An implementation of DES and AES secure against some attacks","author":"akkar","year":"2001","journal-title":"Proc Cryptographic Hardware and Embedded Systems?CHES 99"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.109"}],"container-title":["IEEE Transactions on Instrumentation and Measurement"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/19\/6595632\/06527967.pdf?arnumber=6527967","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:47:24Z","timestamp":1638218844000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6527967\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,10]]},"references-count":27,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tim.2013.2259754","relation":{},"ISSN":["0018-9456","1557-9662"],"issn-type":[{"value":"0018-9456","type":"print"},{"value":"1557-9662","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,10]]}}}