{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,29]],"date-time":"2026-04-29T22:33:24Z","timestamp":1777502004055,"version":"3.51.4"},"reference-count":42,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2021,1,1]],"date-time":"2021-01-01T00:00:00Z","timestamp":1609459200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Neural Netw. Learning Syst."],"published-print":{"date-parts":[[2021,1]]},"DOI":"10.1109\/tnnls.2020.2979682","type":"journal-article","created":{"date-parts":[[2020,4,7]],"date-time":"2020-04-07T21:55:02Z","timestamp":1586296502000},"page":"457-462","source":"Crossref","is-referenced-by-count":21,"title":["Fast Algorithms for Quaternion-Valued Convolutional Neural Networks"],"prefix":"10.1109","volume":"32","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-4513-4593","authenticated-orcid":false,"given":"Aleksandr","family":"Cariow","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3859-484X","authenticated-orcid":false,"given":"Galina","family":"Cariowa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","article-title":"Speech recognition with quaternion neural networks","author":"parcollet","year":"2018","journal-title":"arXiv 1811 09678"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.21437\/Interspeech.2018-1898"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1016\/j.neucom.2016.09.060"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/s11063-017-9716-1"},{"key":"ref31","article-title":"Deep quaternion networks","author":"gaudet","year":"2017","journal-title":"arXiv 1712 04604"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2018.2852752"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1002\/mma.2660"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/TNN.2011.2157358"},{"key":"ref35","article-title":"Quaternion convolutional neural networks for detection and localization of 3D sound events","author":"comminiello","year":"2018","journal-title":"arXiv 1812 06811"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-01237-3_39"},{"key":"ref10","first-page":"1","author":"ovtcharov","year":"2015","journal-title":"Accelerating deep convolutional neural networks using specialized hardware"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4612-3650-4"},{"key":"ref11","article-title":"A GPU-outperforming FPGA accelerator architecture for binary convolutional neural networks","author":"li","year":"2017","journal-title":"arXiv 1702 06392"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2016.2616357"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2847263.2847265"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-319-11179-7_36"},{"key":"ref15","first-page":"1","article-title":"A high performance FPGA-based accelerator for large-scale convolutional neural networks","author":"li","year":"2016","journal-title":"Proc Int Conf Field Program Logic Appl (FPL)"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3289602.3293905"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/LES.2017.2743247"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.435"},{"key":"ref19","first-page":"40","article-title":"Hardware-efficient structure of the accelerating module for implementation of convolutional neural network basic operation","author":"cariow","year":"2018","journal-title":"Measurement Automation and Monitoring"},{"key":"ref28","article-title":"A survey of FPGA-based neural network accelerator","author":"guo","year":"2017","journal-title":"arXiv 1712 08934"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2684746.2689060"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/3061639.3062244"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/3020078.3021741"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/2508148.2485925"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/3283452"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1145\/1854273.1854309"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/FPL.2009.5272559"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1145\/1815961.1815993"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2010.5537908"},{"key":"ref9","article-title":"Machine learning on very large data sets","author":"farabet","year":"2011","journal-title":"Large-Scale FPGA-Based Convolutional Networks"},{"key":"ref1","first-page":"1097","article-title":"Imagenet classification with deep convolutional neural networks","volume":"1","author":"krizhevsky","year":"2012","journal-title":"Proc NIPS"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/FCCM.2017.64"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2968456.2968476"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.3390\/a11100159"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/79.109206"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2018.8465842"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.7726\/jspta.2014.1001"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/CODESISSS.2018.8525909"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/3200691.3178496"},{"key":"ref25","first-page":"1","article-title":"Efficient winograd-based convolution kernel implementation on edge devices","author":"xygkis","year":"2018","journal-title":"Proc 55th Annu Design Autom Conf (DAC)"}],"container-title":["IEEE Transactions on Neural Networks and Learning Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/5962385\/9312808\/09058993.pdf?arnumber=9058993","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,5,10]],"date-time":"2022-05-10T14:53:00Z","timestamp":1652194380000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9058993\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2021,1]]},"references-count":42,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tnnls.2020.2979682","relation":{},"ISSN":["2162-237X","2162-2388"],"issn-type":[{"value":"2162-237X","type":"print"},{"value":"2162-2388","type":"electronic"}],"subject":[],"published":{"date-parts":[[2021,1]]}}}