{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,23]],"date-time":"2026-04-23T15:01:52Z","timestamp":1776956512375,"version":"3.51.4"},"reference-count":59,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2015,2,1]],"date-time":"2015-02-01T00:00:00Z","timestamp":1422748800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100000781","name":"European Research Council","doi-asserted-by":"publisher","award":["210389"],"award-info":[{"award-number":["210389"]}],"id":[{"id":"10.13039\/501100000781","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Intel ICRI-CI Center"},{"name":"Technion Funds for Security Research"},{"name":"Israel Ministry of Science and Technology"},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-1217506"],"award-info":[{"award-number":["CCF-1217506"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-0939370"],"award-info":[{"award-number":["CCF-0939370"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000001","name":"NSF","doi-asserted-by":"publisher","award":["CCF-AF-0937274"],"award-info":[{"award-number":["CCF-AF-0937274"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2015,2,1]]},"DOI":"10.1109\/tpds.2014.2310226","type":"journal-article","created":{"date-parts":[[2014,3,11]],"date-time":"2014-03-11T18:02:53Z","timestamp":1394560973000},"page":"492-506","source":"Crossref","is-referenced-by-count":5,"title":["On the Capacity of Bufferless Networks-on-Chip"],"prefix":"10.1109","volume":"26","author":[{"given":"Alexander","family":"Shpiner","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Erez","family":"Kantor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Pu","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Israel","family":"Cidon","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Isaac","family":"Keslassy","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269001"},{"key":"ref38","first-page":"31","article-title":"A guaranteed-throughput switch for network-on-chip","author":"liu","year":"0","journal-title":"Proc Int Symp Syst -on-Chip"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.99"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1145\/2392987.2392995"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2012.25"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1669112.1669144"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/ESTMED.2005.1518069"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/1930037.1930040"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090666"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1289816.1289855"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2012.13"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/1244002.1244335"},{"key":"ref29","first-page":"1","article-title":"BPS: A bufferless switching technique for NoCs","author":"gomez","year":"0","journal-title":"Workshop on Interconn Netw Arch"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/HOTI.2008.22"},{"key":"ref1","year":"0"},{"key":"ref20","first-page":"468","article-title":"Efficient all-to-all personalized exchange in multidimensional torus networks","author":"suh","year":"0","journal-title":"Proc Int Conf Parallel Process"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.23"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/71.850832"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/L-CA.2004.8"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1145\/79173.79181"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/VLSISOC.2009.6041339"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1155\/2007\/68432"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/HPSR.2004.1303440"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.250"},{"key":"ref59","first-page":"163","article-title":"Evaluation of deflection routing on various NOC topologies","author":"feng","year":"0","journal-title":"Proc 9th IEEE Int ASIC Conf"},{"key":"ref58","article-title":"Realistic workload characterization and analysis for networks-on-chip design","author":"gratz","year":"0","journal-title":"Proceedings of the Workshop on Chip Multiprocessor Memory Systems and Interconnect"},{"key":"ref57","doi-asserted-by":"publisher","DOI":"10.1006\/jagm.1998.0981"},{"key":"ref56","doi-asserted-by":"publisher","DOI":"10.1016\/j.jda.2010.07.001"},{"key":"ref55","doi-asserted-by":"publisher","DOI":"10.1007\/s00224-002-1001-6"},{"key":"ref54","first-page":"553","article-title":"Exact analysis of hot-potato routing (extended abstract)","author":"feige","year":"0","journal-title":"Proc 33rd Annu Symp Found Comput Sci"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1145\/564870.564874"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1007\/s002240000076"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555781"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/871506.871531"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2000673"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2009.5090700"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/1323548.1323561"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378783"},{"key":"ref15","first-page":"56","article-title":"MPI: A standard message passing interface","volume":"12","author":"walker","year":"1996","journal-title":"Supercomputer"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IPPS.1994.288248"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/71.503775"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/IPPS.1998.669924"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/71.679215"},{"key":"ref4","author":"liu","year":"2009"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"153","DOI":"10.1145\/1394608.1382135","article-title":"Corona: System implications of emerging nanophotonic technology","volume":"36","author":"vantrease","year":"2008","journal-title":"SIGARCH Comput Archit News"},{"key":"ref6","year":"0"},{"key":"ref5","first-page":"1","article-title":"Optical ring network-on-chip (ORNoC): Architecture and design methodology","author":"le beux","year":"0","journal-title":"Proc Design Autom Test Eur Conf Exhib"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.28"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DSD.2007.4341445"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2007.19"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/NOCS.2010.10"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/71.588613"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1007\/s00453-005-1189-3"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1109\/71.689439"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/71.970553"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/PARELEC.2006.25"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/ICN.2010.12"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2010.35"},{"key":"ref43","first-page":"551","article-title":"Impact of parallel workloads on NoC architecture design","author":"de freitas","year":"0","journal-title":"Proc 18th Eur Int Parallel Distrib Netw -Based Process"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/7010070\/06762977.pdf?arnumber=6762977","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:01:05Z","timestamp":1642003265000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6762977\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,2,1]]},"references-count":59,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2014.2310226","relation":{},"ISSN":["1045-9219"],"issn-type":[{"value":"1045-9219","type":"print"}],"subject":[],"published":{"date-parts":[[2015,2,1]]}}}