{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,12]],"date-time":"2026-05-12T11:29:43Z","timestamp":1778585383210,"version":"3.51.4"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2016,5,1]],"date-time":"2016-05-01T00:00:00Z","timestamp":1462060800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Galician Government"},{"DOI":"10.13039\/501100002924","name":"FEDER","doi-asserted-by":"publisher","award":["GRC2013\/055"],"award-info":[{"award-number":["GRC2013\/055"]}],"id":[{"id":"10.13039\/501100002924","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003329","name":"Ministry of Economy and Competitiveness of Spain","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003329","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002924","name":"FEDER","doi-asserted-by":"publisher","award":["TIN2013-42148-P"],"award-info":[{"award-number":["TIN2013-42148-P"]}],"id":[{"id":"10.13039\/501100002924","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2016,5,1]]},"DOI":"10.1109\/tpds.2015.2450718","type":"journal-article","created":{"date-parts":[[2015,7,21]],"date-time":"2015-07-21T21:52:48Z","timestamp":1437515568000},"page":"1331-1343","source":"Crossref","is-referenced-by-count":10,"title":["Designing Efficient Index-Digit Algorithms for CUDA GPU Architectures"],"prefix":"10.1109","volume":"27","author":[{"given":"Jacobo","family":"Lobeiras","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Margarita","family":"Amor","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ramon","family":"Doallo","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693472"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-012-0807-5"},{"key":"ref32","first-page":"1","article-title":"Use registers and multiple outputs per thread on GPU","author":"volkov","year":"0","journal-title":"Proc Int Workshop Parallel Matrix Algorithms Appl"},{"key":"ref31","first-page":"1","article-title":"Better performance at lower occupancy","author":"volkov","year":"0","journal-title":"Proc GPU Technology Conf"},{"key":"ref30","author":"kirk","year":"2012","journal-title":"Programming Massively Parallel Processors A Hands-on Approach"},{"key":"ref37","article-title":"Operator strings algebraic manipulation","author":"lobeiras","year":"2015"},{"key":"ref36","first-page":"810","article-title":"A divide-and-conquer method of solving tridiagonal systems on hypercube massively parallel computers","author":"wang","year":"0","journal-title":"Proc IEEE Symp Parallel Distrib Process"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/2370816.2370858"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1145\/1464182.1464209"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2011.311"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1007\/s11390-013-1314-8"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/321941.321949"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1016\/0167-8191(95)00062-3"},{"key":"ref14","article-title":"BPLG: A tuned butterfly processing library for GPU architectures","author":"lobeiras","year":"2014","journal-title":"Int J Parallel Program"},{"key":"ref15","year":"2009","journal-title":"Intel Integrated Performance Primitives for Intel Architecture Reference Manual"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2004.840301"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2004.840306"},{"key":"ref18","first-page":"1","article-title":"Auto-tuning 3-D FFT Library for CUDA GPUs","author":"matsuoka","year":"0","journal-title":"Proc Conf High Perform Comput Netw Storage Anal"},{"key":"ref19","year":"2012","journal-title":"CUDA CUFFT Library"},{"key":"ref28","year":"2012","journal-title":"CUSPARSE Library"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/1555754.1555775"},{"key":"ref27","first-page":"4:1","article-title":"Register packing for cyclic reduction: A case study","author":"davison","year":"0","journal-title":"Proc 4th Workshop General Purpose Process Graphics Process Units"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693470"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISPASS.2010.5452013"},{"key":"ref29","year":"2013","journal-title":"CUDA Data Parallel Primitives Library"},{"key":"ref5","first-page":"382","author":"zhang","year":"0","journal-title":"Proc 17th IEEE Int Symp High-Perform Comput Archit"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693471"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICPPW.2010.59"},{"key":"ref2","year":"2011","journal-title":"The OpenCL Specification"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1941553.1941589"},{"key":"ref1","year":"2011","journal-title":"CUDA Compute Unified Device Architecture"},{"key":"ref20","year":"2009","journal-title":"Intel Math Kernel Library Reference Manual"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/1693453.1693472"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2005.07.005"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2012.12"},{"key":"ref23","first-page":"444","article-title":"A scalable tridiagonal solver for GPU","author":"kim","year":"0","journal-title":"Proc Int Conf Parallel Process"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2011.92"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1016\/j.parco.2012.03.003"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/7449033\/07138631.pdf?arnumber=7138631","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T02:34:21Z","timestamp":1633919661000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7138631\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,5,1]]},"references-count":38,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2015.2450718","relation":{},"ISSN":["1045-9219"],"issn-type":[{"value":"1045-9219","type":"print"}],"subject":[],"published":{"date-parts":[[2016,5,1]]}}}