{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,4]],"date-time":"2025-04-04T07:47:03Z","timestamp":1743752823208,"version":"3.37.3"},"reference-count":36,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2017,8,1]],"date-time":"2017-08-01T00:00:00Z","timestamp":1501545600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China (NSFC)","doi-asserted-by":"publisher","award":["61402302","61472260"],"award-info":[{"award-number":["61402302","61472260"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100002888","name":"Beijing Municipal Commission of Education","doi-asserted-by":"crossref","award":["KM201610028016"],"award-info":[{"award-number":["KM201610028016"]}],"id":[{"id":"10.13039\/501100002888","id-type":"DOI","asserted-by":"crossref"}]},{"name":"Teacher Career Development for Universities and Colleges Universities"},{"name":"Beijing Municipality","award":["IDHT20150507"],"award-info":[{"award-number":["IDHT20150507"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2017,8,1]]},"DOI":"10.1109\/tpds.2017.2654243","type":"journal-article","created":{"date-parts":[[2017,1,18]],"date-time":"2017-01-18T14:18:33Z","timestamp":1484749113000},"page":"2314-2327","source":"Crossref","is-referenced-by-count":2,"title":["On the Implication of NTC versus Dark Silicon on Emerging Scale-Out Workloads: The Multi-Core Architecture Perspective"],"prefix":"10.1109","volume":"28","author":[{"given":"Jing","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Xin","family":"Fu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Weigong","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Junwei","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Keni","family":"Qiu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tao","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2006.79"},{"key":"ref32","first-page":"1","article-title":"Rethinking last-level cache management for multicores operating at near-threshold voltages","author":"hijazand","year":"0","journal-title":"Proc ISCA-41 Int Workshop Near-Threshold Comput"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1145\/2024723.2000118"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/2593069.2593184"},{"key":"ref36","doi-asserted-by":"crossref","first-page":"3","DOI":"10.1109\/TSM.2007.913186","article-title":"VARIUS: A model of parameter variation and resulting timing errors for microarchitects","volume":"21","author":"teodorescu","year":"2008","journal-title":"IEEE Trans Semiconductor Manuf"},{"key":"ref35","first-page":"469","article-title":"McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures","author":"sheng","year":"0","journal-title":"Proc 42nd Annu IEEE\/ACM Int Symp Microarchitecture"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/2.982916"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1145\/2366231.2337217"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522302"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/2408776.2408797"},{"article-title":"Dark versus dim silicon and near-threshold computing","year":"2013","author":"wangand","key":"ref13"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228571"},{"key":"ref15","first-page":"1","article-title":"Voltage island management in near threshold manycore architectures to mitigate dark silicon","author":"silvano","year":"0","journal-title":"Proc Des Autom Test Europe Conf Exhib"},{"key":"ref16","first-page":"58","article-title":"A family of 45nm IA processors","author":"kumarand","year":"0","journal-title":"Proc IEEE Int Solid-State Circuits Conf Dig Techn Papers"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2011.77"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/2150976.2150982"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2016.7446104"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2011.5749758"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/2324876.2324879"},{"key":"ref27","first-page":"1","article-title":"Operating SECDED-based caches at ultra-low voltage with FLAIR","author":"qureshiand","year":"0","journal-title":"Proc 43rd Annu IEEE\/IFIP Int Conf Dependable Syst Netw"},{"key":"ref3","first-page":"1131","article-title":"Is dark silicon useful? Harnessing the four horsemen of the coming dark silicon apocalypse","author":"taylor","year":"0","journal-title":"Proc 49th ACM\/EDAC\/IEEE Des Autom Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2034764"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522347"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/HPCA.2013.6522348"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2013.4"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2012.6176932"},{"key":"ref2","first-page":"365","article-title":"Dark silicon and the end of multicore scaling","author":"esmaeilzadeh","year":"2011","journal-title":"2011 38th Annual International Symposium on Computer Architecture (ISCA) ISCA"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1145\/1816038.1815968"},{"year":"0","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2464996.2465009"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2012.6263951"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2014.54"},{"key":"ref24","article-title":"The NIST definition of cloud computing","volume":"145","author":"melland","year":"2011","journal-title":"NIST Special Publication"},{"key":"ref23","first-page":"1","article-title":"Cloud Computing Benchmarking: A Survey","author":"vazquez","year":"2014","journal-title":"Int Conf Grid & Cloud Comput Appl (GCA’14)"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2009.2033621"},{"key":"ref25","first-page":"389","article-title":"Energy characterization and instruction-level energy model of Intel's Xeon Phi processor","author":"shaoand","year":"0","journal-title":"Proc Int Symp Low Power Electron Des"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/7979644\/07823012.pdf?arnumber=7823012","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:38:36Z","timestamp":1641987516000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7823012\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,8,1]]},"references-count":36,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2017.2654243","relation":{},"ISSN":["1045-9219"],"issn-type":[{"type":"print","value":"1045-9219"}],"subject":[],"published":{"date-parts":[[2017,8,1]]}}}