{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,23]],"date-time":"2025-10-23T05:31:36Z","timestamp":1761197496262,"version":"3.41.0"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"am","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2018,2,1]],"date-time":"2018-02-01T00:00:00Z","timestamp":1517443200000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"funder":[{"name":"National Science Foundation","award":["1161857"],"award-info":[{"award-number":["1161857"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2018,2,1]]},"DOI":"10.1109\/tpds.2017.2754376","type":"journal-article","created":{"date-parts":[[2017,9,19]],"date-time":"2017-09-19T18:14:48Z","timestamp":1505844888000},"page":"377-390","source":"Crossref","is-referenced-by-count":14,"title":["Easy PRAM-Based High-Performance Parallel Programming with ICE"],"prefix":"10.1109","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0002-0726-6747","authenticated-orcid":false,"given":"Fady","family":"Ghanim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Uzi","family":"Vishkin","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Rajeev","family":"Barua","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"year":"2009","author":"cormen","journal-title":"Introduction to Algorithms","key":"ref38"},{"doi-asserted-by":"publisher","key":"ref33","DOI":"10.1016\/0743-7315(90)90035-N"},{"doi-asserted-by":"publisher","key":"ref32","DOI":"10.1145\/69558.69562"},{"year":"1988","author":"chandy","journal-title":"Parallel Program Design A Foundation","key":"ref31"},{"doi-asserted-by":"publisher","key":"ref30","DOI":"10.1145\/7902.7903"},{"doi-asserted-by":"publisher","key":"ref37","DOI":"10.1145\/1583991.1584017"},{"doi-asserted-by":"publisher","key":"ref36","DOI":"10.1145\/1693453.1693479"},{"year":"0","key":"ref35"},{"doi-asserted-by":"publisher","key":"ref34","DOI":"10.1109\/SPDP.1991.218300"},{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/ISPDC.2010.16"},{"doi-asserted-by":"publisher","key":"ref11","DOI":"10.1145\/2141702.2141714"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1145\/2486159.2486164"},{"key":"ref13","first-page":"1","article-title":"Dynamically tuned push-relabel algorithm for the maximum flow problem on CPU-GPU-hybrid platforms","author":"he","year":"2010","journal-title":"Proc 24th IEEE Int Parallel Distrib Process Symp"},{"key":"ref14","first-page":"131","article-title":"Better speedups for parallel max-flow","author":"caragea","year":"0","journal-title":"Proc ACM Symp Parallel Algorithms Architect"},{"doi-asserted-by":"publisher","key":"ref15","DOI":"10.1016\/j.tcs.2013.10.009"},{"key":"ref16","first-page":"107","article-title":"Highly parallel multi-dimensional fast fourier transform on fine- and course-grained many-core approaches","author":"saybasili","year":"2009","journal-title":"Proc Parallel Distrib Comput Syst Conf"},{"key":"ref17","doi-asserted-by":"crossref","first-page":"181","DOI":"10.3233\/EMC-2006-00031","article-title":"Case study of gate-level logic simulation on an extremely fine-grained chip multiprocessor","volume":"2","author":"gu","year":"2006","journal-title":"J Embedded Comput"},{"year":"1992","author":"jaja","journal-title":"An Introduction to Parallel Algorithms","key":"ref18"},{"year":"2001","author":"keller","journal-title":"Practical PRAM Programming","key":"ref19"},{"doi-asserted-by":"publisher","key":"ref28","DOI":"10.1145\/232627.232650"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1145\/378580.378597"},{"year":"1990","author":"blelloch","journal-title":"Vector Models for Data-Parallel Computing","key":"ref27"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1145\/1366230.1366240"},{"year":"2006","author":"balkan","article-title":"Programmer's manual for XMTC language, XMTC compiler and XMT simulator","key":"ref6"},{"doi-asserted-by":"publisher","key":"ref29","DOI":"10.1145\/227234.227246"},{"doi-asserted-by":"publisher","key":"ref5","DOI":"10.1145\/277651.277680"},{"year":"2003","author":"vishkin","article-title":"Prefix sums and an application thereoff","key":"ref8"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1145\/1067649.801711"},{"doi-asserted-by":"publisher","key":"ref2","DOI":"10.1145\/1866739.1866757"},{"year":"2002","author":"vishkin","article-title":"Spawn-join instruction set architecture for providing explicit multi-threading (XMT)","key":"ref9"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1145\/173284.155333"},{"year":"0","author":"vishkin","article-title":"Thinking in parallel: Some basic data-parallel algorithms and techniques - course class notes","key":"ref20"},{"key":"ref22","article-title":"Models for advancing PRAM and other algorithms into parallel programs for a PRAM-on-Chip platform","author":"vishkin","year":"2008","journal-title":"Handbook of Parallel Computing"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/IPDPS.2011.270"},{"year":"0","key":"ref24"},{"year":"0","key":"ref23"},{"doi-asserted-by":"publisher","key":"ref26","DOI":"10.1147\/rd.355.0767"},{"year":"0","key":"ref25"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/ieeexplore.ieee.org\/ielaam\/71\/8258926\/8046100-aam.pdf","content-type":"application\/pdf","content-version":"am","intended-application":"syndication"},{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/8258926\/08046100.pdf?arnumber=8046100","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,6,25]],"date-time":"2025-06-25T20:27:43Z","timestamp":1750883263000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8046100\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,2,1]]},"references-count":38,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2017.2754376","relation":{},"ISSN":["1045-9219"],"issn-type":[{"type":"print","value":"1045-9219"}],"subject":[],"published":{"date-parts":[[2018,2,1]]}}}