{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,12]],"date-time":"2025-11-12T03:24:32Z","timestamp":1762917872470,"version":"3.37.3"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2018,10,1]],"date-time":"2018-10-01T00:00:00Z","timestamp":1538352000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2018,10,1]]},"DOI":"10.1109\/tpds.2018.2819670","type":"journal-article","created":{"date-parts":[[2018,3,26]],"date-time":"2018-03-26T18:04:36Z","timestamp":1522087476000},"page":"2164-2175","source":"Crossref","is-referenced-by-count":5,"title":["A Dataflow Processor as the Basis of a Tiled Polymorphic Computing Architecture with Fine-Grain Instruction Migration"],"prefix":"10.1109","volume":"29","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-2944-2462","authenticated-orcid":false,"given":"David","family":"Hentrich","sequence":"first","affiliation":[]},{"given":"Erdal","family":"Oruklu","sequence":"additional","affiliation":[]},{"given":"Jafar","family":"Saniie","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"journal-title":"ADSP-219x DSP Instruction Set Reference","year":"2005","key":"ref31"},{"journal-title":"SC140 DSP Core Reference Manual","year":"2005","key":"ref30"},{"key":"ref10","article-title":"MONARCH: A first generation polymorphic\n computing processor","author":"vahey","year":"2006","journal-title":"presented at the 10th Annu High Perform Embedded Comput Workshop"},{"key":"ref11","article-title":"Worlds first polymorphic computer MONARCH","author":"prager","year":"2007","journal-title":"11th High Performance Embedded Computing Workshop"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.997877"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.21236\/ADA419598"},{"key":"ref14","doi-asserted-by":"crossref","DOI":"10.21236\/ADA475987","article-title":"Polymorphous computing architectures","author":"horowitz","year":"2007"},{"key":"ref15","first-page":"2326","article-title":"A embedded real-time polymorphic computing platform architecture","author":"wu","year":"2013","journal-title":"Proc Int Conf Mechatronic Sci Electric Eng Comput"},{"journal-title":"The RAW prototype design document","year":"2005","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1233307.1233308"},{"key":"ref18","first-page":"141","article-title":"Instruction scheduling for a tiled dataflow architecture","author":"mercaldi","year":"2006","journal-title":"Proc 6th Int Conf Archit Support Program Lang Oper Syst"},{"article-title":"Operation cell data processor systems and methods","year":"2017","author":"hentrich","key":"ref19"},{"key":"ref28","first-page":"386","article-title":"Highly concurrent scalar processing","author":"hsu","year":"1986","journal-title":"Proc 13th Annu Symp on Comput Arch"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/27633.28055"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/223982.225965"},{"journal-title":"Pipelined and Parallel Computer Architectures","year":"1996","author":"shiva","key":"ref3"},{"journal-title":"Future Embedded Computing Architectures","year":"2000","author":"graybill","key":"ref6"},{"journal-title":"TMS320C62x\/C67x CPU and Instruction Set Reference Guide","year":"2010","key":"ref29"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.4236\/cs.2011.24049"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2004.65"},{"key":"ref7","first-page":"1","article-title":"Multi-core\/tile polymorphous computing systems","author":"spaanenburg","year":"2008","journal-title":"Proc 1st Int Conf on Inform Technology"},{"journal-title":"Processor Architecture From Dataflow to Superscalar and Beyond","year":"1999","author":"silc","key":"ref2"},{"article-title":"An evaluation of the TRIPS computer system (extended technical\n report)","year":"2008","author":"gebhart","key":"ref9"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1145\/642089.642111"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2465.214917"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/45.127642"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/MSPEC.1985.6370784"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MSSC.2009.932433"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/MC.1984.1659185"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1145\/360933.360975"},{"key":"ref25","first-page":"89","article-title":"Dataflow predication","author":"smith","year":"2006","journal-title":"Proc 39th Annu IEEE\/ACM Int Symp Microarchitecture"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/8458269\/08325523.pdf?arnumber=8325523","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,26]],"date-time":"2022-01-26T12:09:01Z","timestamp":1643198941000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/8325523\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,10,1]]},"references-count":31,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2018.2819670","relation":{},"ISSN":["1045-9219","1558-2183","2161-9883"],"issn-type":[{"type":"print","value":"1045-9219"},{"type":"electronic","value":"1558-2183"},{"type":"electronic","value":"2161-9883"}],"subject":[],"published":{"date-parts":[[2018,10,1]]}}}