{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,4]],"date-time":"2026-07-04T16:44:50Z","timestamp":1783183490110,"version":"3.54.6"},"reference-count":55,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","funder":[{"DOI":"10.13039\/501100012166","name":"National Key Research and Development Program of China","doi-asserted-by":"publisher","award":["2017YFB0202901"],"award-info":[{"award-number":["2017YFB0202901"]}],"id":[{"id":"10.13039\/501100012166","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Key-Area Research and Development Program of Guangdong Province","award":["2019B010136001"],"award-info":[{"award-number":["2019B010136001"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61672186"],"award-info":[{"award-number":["61672186"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61872294"],"award-info":[{"award-number":["61872294"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Shenzhen Technology Research and Development","award":["JCYJ20190806143418198"],"award-info":[{"award-number":["JCYJ20190806143418198"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. Parallel Distrib. Syst."],"published-print":{"date-parts":[[2022,1,1]]},"DOI":"10.1109\/tpds.2021.3084813","type":"journal-article","created":{"date-parts":[[2021,5,28]],"date-time":"2021-05-28T19:38:30Z","timestamp":1622230710000},"page":"70-87","source":"Crossref","is-referenced-by-count":78,"title":["Optimizing Depthwise Separable Convolution Operations on GPUs"],"prefix":"10.1109","volume":"33","author":[{"given":"Gangzhao","family":"Lu","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Weizhe","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Zheng","family":"Wang","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS47924.2020.00071"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2012.160"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPS.2019.00022"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/s11227-015-1613-7"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/IPDPSW.2018.00165"},{"key":"ref30","article-title":"Dissecting the NVIDIA Volta GPU architecture via microbenchmarking","author":"jia","year":"2018","journal-title":"arXiv 1804 06826"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2019.2939785"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1145\/3126908.3126939"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/3378176"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2015.2481890"},{"key":"ref28","first-page":"399","article-title":"Optimizing GPU memory transactions for convolution operations","author":"lu","year":"2020","journal-title":"Proc IEEE Int'l Conf Cluster Computing (Cluster '00)"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2018.00474"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TPDS.2016.2549523"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v34i07.6948"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.00950"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/3330345.3330382"},{"key":"ref22","article-title":"cuDNN: Efficient primitives for deep learning","author":"chetlur","year":"2014"},{"key":"ref21","year":"0"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1145\/3295500.3356162"},{"key":"ref23","article-title":"Fast convolutional nets with fbfft: A GPU performance evaluation","author":"vasilache","year":"2015","journal-title":"Proc 3rd Int Conf Learn Representations"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2015.7298594"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1145\/3350755.3400266"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2016.435"},{"key":"ref51","first-page":"815","article-title":"Mec: Memory-efficient convolution for deep neural network","author":"cho","year":"2017","journal-title":"Proc 34th Int Conf Mach Learn"},{"key":"ref55","first-page":"5776","article-title":"High performance zero-memory overhead direct convolutions","author":"zhang","year":"2018","journal-title":"Proc Int Conf Mach Learn"},{"key":"ref54","doi-asserted-by":"publisher","DOI":"10.1109\/SC.2016.53"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1109\/CLUSTER.2018.00058"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1109\/ICIP.2013.6738436"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2019.2936913"},{"key":"ref11","article-title":"SEED RL: Scalable and efficient deep-RL with accelerated central inference","author":"espeholt","year":"2020"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2020.2973144"},{"key":"ref12","first-page":"109","article-title":"Optimizing N-dimensional, winograd-based convolution for manycore CPUs","author":"zhen","year":"2018","journal-title":"Proc ACM SIGPLAN Symp Princ Pract Parallel Program"},{"key":"ref13","first-page":"1025","article-title":"Optimizing CNN model inference on CPUs","author":"liu","year":"2019","journal-title":"Proc USENIX Annu Techn Conf (USENIX ATC 19)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/3293883.3295701"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/3295500.3356138"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1145\/3332466.3374520"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2017.7995254"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/3293883.3295734"},{"key":"ref19","first-page":"377","article-title":"ugemm: Unary computing architecture for GEMM applications","author":"wu","year":"2020","journal-title":"Proc ACM\/IEEE 47th Annu Int Symp Comput Architecture (ISCA)"},{"key":"ref4","first-page":"13604","article-title":"MnasFPN: Learning latency-aware pyramid architecture for object detection on mobile devices","author":"chen","year":"2020","journal-title":"Proc IEEE Conf Comput Vis and Pattern Recog"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1609\/aaai.v34i07.6902"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2019.01288"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.01308"},{"key":"ref8","first-page":"6105","article-title":"Efficientnet: Rethinking model scaling for convolutional neural networks","author":"tan","year":"2019","journal-title":"Proc Int Conf Mach Learn"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2019.00140"},{"key":"ref49","article-title":"Fast training of convolutional networks through FFTs","author":"mathieu","year":"2013","journal-title":"Arxiv 1312 5851"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR42600.2020.01461"},{"key":"ref46","year":"0"},{"key":"ref45","year":"0"},{"key":"ref48","article-title":"High performance convolutional neural networks for document processing","author":"chellapilla","year":"2006","journal-title":"Proceedings of the International Workshop on Frontiers of Handwriting and Recognition"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/CVPR.2009.5206848"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-030-34356-9_37"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/3373376.3378508"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/ICCV.2019.00141"},{"key":"ref43","first-page":"265","article-title":"Tensorflow: A system for large-scale machine learning","author":"abadi","year":"2016","journal-title":"Proc 12th USENIX Symp Operating Syst Des Implementation"}],"container-title":["IEEE Transactions on Parallel and Distributed Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/71\/9465725\/09444208.pdf?arnumber=9444208","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,8,30]],"date-time":"2021-08-30T21:40:50Z","timestamp":1630359650000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/9444208\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2022,1,1]]},"references-count":55,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tpds.2021.3084813","relation":{},"ISSN":["1045-9219","1558-2183","2161-9883"],"issn-type":[{"value":"1045-9219","type":"print"},{"value":"1558-2183","type":"electronic"},{"value":"2161-9883","type":"electronic"}],"subject":[],"published":{"date-parts":[[2022,1,1]]}}}