{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,7,28]],"date-time":"2026-07-28T14:26:58Z","timestamp":1785248818584,"version":"3.55.0"},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2002,6,1]],"date-time":"2002-06-01T00:00:00Z","timestamp":1022889600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2002,6]]},"DOI":"10.1109\/tvlsi.2002.1043332","type":"journal-article","created":{"date-parts":[[2003,1,3]],"date-time":"2003-01-03T17:55:00Z","timestamp":1041616500000},"page":"292-300","source":"Crossref","is-referenced-by-count":14,"title":["Reduced computational redundancy implementation of DSP algorithms using computation sharing vector scaling"],"prefix":"10.1109","volume":"10","author":[{"given":"K.","family":"Muhammad","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"K.","family":"Roy","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref1","volume-title":"Digital Signal Processing Systems","author":"Parhi","year":"1999"},{"key":"ref2","volume-title":"Principles of CMOS VLSI Design: A Systems Perspective","author":"Weste","year":"1994"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/NAECON.1996.517660"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1007\/bf00925121"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1142\/9789814651578"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/12.403713"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/92.661252"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.1994.471512"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/PCCC.1995.472503"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.1995.465378"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/4.859511"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1999.808430"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/4.272114"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/92.920818"},{"key":"ref15","volume-title":"Introduction to Algorithms","author":"Cormen","year":"1990"},{"key":"ref16","volume-title":"Algorithmic and architectural techniques for low-power digital signal processing","author":"Muhammad","year":"1999"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/22365\/01043332.pdf?arnumber=1043332","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,3,23]],"date-time":"2025-03-23T04:55:06Z","timestamp":1742705706000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1043332\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,6]]},"references-count":16,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2002.1043332","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2002,6]]}}}