{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,20]],"date-time":"2025-04-20T04:40:03Z","timestamp":1745124003947,"version":"3.40.4"},"reference-count":25,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2002,6,1]],"date-time":"2002-06-01T00:00:00Z","timestamp":1022889600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2002,6]]},"DOI":"10.1109\/tvlsi.2002.1043338","type":"journal-article","created":{"date-parts":[[2003,1,3]],"date-time":"2003-01-03T17:55:00Z","timestamp":1041616500000},"page":"351-362","source":"Crossref","is-referenced-by-count":11,"title":["Vertically integrated SOI circuits for low-power and high-performance applications"],"prefix":"10.1109","volume":"10","author":[{"family":"Liqiong Wei","sequence":"first","affiliation":[]},{"family":"Rongtian Zhang","sequence":"additional","affiliation":[]},{"given":"K.","family":"Roy","sequence":"additional","affiliation":[]},{"family":"Zhanping Chen","sequence":"additional","affiliation":[]},{"given":"D.B.","family":"Janes","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/SOI.1997.634943"},{"key":"ref2","first-page":"69","article-title":"Design and optimization of dual-gate SOI MOSFET\u2019s for low voltage low power CMOS circuits","volume-title":"1998 Int. SOI Conf.","author":"Wei"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/SOI.1999.819850"},{"key":"ref4","first-page":"75","article-title":"MOS transistor: Scaling and performance trend","author":"Bohr","year":"1995","journal-title":"Semiconductor Int."},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1995.499187"},{"volume-title":"Circuits, Interconnections, and Packaging for VLSI","year":"1990","author":"Bakoglu","key":"ref6"},{"volume-title":"International Technology Roadmap for Semiconductors","year":"1999","key":"ref7"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-2121-8"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/soi.1995.526497"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/16.106240"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1116\/1.590682"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/EDL.1980.25252"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/16.249482"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/0167-9317(91)90220-8"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/16.141237"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/16.285022"},{"article-title":"SOISPICE-4 (ver. 4.4) user\u2019s guide","year":"1998","author":"Fossum","key":"ref17"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.1998.708155"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.1994.383301"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/EDL.1983.25766"},{"key":"ref21","first-page":"54","article-title":"Novel 3D structures","volume-title":"Proc. 1999 Int. SOI Conf.","author":"Sarawat"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4615-2307-9_2"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2000.904419"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2000.896476"},{"key":"ref25","first-page":"217","article-title":"Power trend and performance characterization of 3-dimensional circuits for future technology generations","volume-title":"Proc. Int. Symp. Quality Electronic Design","author":"Zhang"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/22365\/01043338.pdf?arnumber=1043338","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,20]],"date-time":"2025-04-20T04:13:04Z","timestamp":1745122384000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1043338\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,6]]},"references-count":25,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2002.1043338","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2002,6]]}}}