{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,21]],"date-time":"2025-04-21T04:03:31Z","timestamp":1745208211660,"version":"3.40.4"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2002,12,1]],"date-time":"2002-12-01T00:00:00Z","timestamp":1038700800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2002,12]]},"DOI":"10.1109\/tvlsi.2002.801574","type":"journal-article","created":{"date-parts":[[2003,3,7]],"date-time":"2003-03-07T18:58:16Z","timestamp":1047063496000},"page":"695-711","source":"Crossref","is-referenced-by-count":20,"title":["A comprehensive 2-D inductance modeling approach for VLSI interconnects: frequency-dependent extraction and compact circuit model synthesis"],"prefix":"10.1109","volume":"10","author":[{"given":"G.V.","family":"Kopcsay","sequence":"first","affiliation":[]},{"given":"B.","family":"Krauter","sequence":"additional","affiliation":[]},{"given":"D.","family":"Widiger","sequence":"additional","affiliation":[]},{"given":"A.","family":"Deutsch","sequence":"additional","affiliation":[]},{"given":"B.J.","family":"Rubin","sequence":"additional","affiliation":[]},{"given":"H.H.","family":"Smith","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"volume-title":"Circuits, Interconnections, and Packaging for VLSI","year":"1990","author":"Bakoglu","key":"ref1"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/43.905676"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2001.915059"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378500"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1980.11621"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1063\/1.3057738"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/5.920582"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/EPEP.2000.895553"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2000.896465"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/4.165336"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/22.868995"},{"volume-title":"WSMP: Watson sparse matrix package","year":"2000","author":"Gupta","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/378239.378501"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1145\/337292.337313"},{"volume-title":"Inductance Calculations","year":"1946","author":"Grover","key":"ref15"},{"volume-title":"Electromagnetic Fields and Energy","year":"1989","author":"Haus","key":"ref16"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1017\/cbo9780511983122"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/MWSYM.1996.512297"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/22.76432"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.1995.479989"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/277044.277133"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1999.777320"},{"volume-title":"Introduction to Electromagnetic Compatibility","year":"1992","author":"Paul","key":"ref23"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/43.285250"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.6028\/bulletin.088"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1147\/rd.165.0470"},{"volume-title":"Resonant noise in VLSI CMOS, IBM Tech. Rep. 51.0481","year":"1988","author":"Sechler","key":"ref27"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/EPEP.2000.895554"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1147\/rd.236.0652"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JRPROC.1942.232015"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/PROC.1982.12381"},{"volume-title":"Digital Signal Integrity: Modeling and Simulation With Interconnects and Packages","year":"2001","author":"Young","key":"ref32"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2002.998366"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/26474\/01178843.pdf?arnumber=1178843","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2025,4,20]],"date-time":"2025-04-20T04:28:08Z","timestamp":1745123288000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/1178843\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2002,12]]},"references-count":33,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2002.801574","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2002,12]]}}}