{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,24]],"date-time":"2025-09-24T10:30:31Z","timestamp":1758709831093},"reference-count":37,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2008,8,1]],"date-time":"2008-08-01T00:00:00Z","timestamp":1217548800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2008,8]]},"DOI":"10.1109\/tvlsi.2008.2000597","type":"journal-article","created":{"date-parts":[[2008,7,29]],"date-time":"2008-07-29T16:47:07Z","timestamp":1217350027000},"page":"975-984","source":"Crossref","is-referenced-by-count":5,"title":["A Fuzzy Optimization Approach for Variation Aware Power Minimization During Gate Sizing"],"prefix":"10.1109","volume":"16","author":[{"given":"V.","family":"Mahalingam","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nagarajan","family":"Ranganathan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Justin E.","family":"Harlow","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","author":"george","year":"1995","journal-title":"Fuzzy Sets and Fuzzy Logic"},{"key":"ref32","doi-asserted-by":"crossref","DOI":"10.1007\/978-1-4615-1519-7","author":"sakawa","year":"2002","journal-title":"Genetic Algorithms and Fuzzy Multiobjective Optimization"},{"key":"ref31","first-page":"375","article-title":"fuzzy linear programming problems with fuzzy membership functions","author":"gasimov","year":"2000","journal-title":"Math Subject Classification"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/EDAC.1990.136648"},{"key":"ref37","doi-asserted-by":"crossref","first-page":"350","DOI":"10.1145\/1013235.1013241","article-title":"The Impact of Variability on Power","author":"nassif","year":"2004","journal-title":"Proceedings of the 2004 International Symposium on Low Power Electronics and Design LPE"},{"key":"ref36","first-page":"271","article-title":"statistical delay computation considering spatial correlations","author":"agarwal","year":"2003","journal-title":"Proc ASP-DAC"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1016\/S0165-0114(98)00449-7"},{"key":"ref34","first-page":"117","article-title":"understanding of fuzzy optimization: theories and methods","volume":"17","author":"tang","year":"2004","journal-title":"J Comp Syst Sci"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2002.802964"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560212"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1065579.1065662"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/332357.332385"},{"key":"ref14","first-page":"773","article-title":"Statistical optimization of leakage power considering process variations using dual-Vth and sizing","author":"srivastava","year":"2004","journal-title":"Proceedings 41st Design Automation Conference 2004 DAC"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/1118299.1118513"},{"key":"ref16","first-page":"309","article-title":"an efficient algorithm for statistical minimization of total power under timing yield constraints","author":"mani","year":"2005","journal-title":"Proc Design Automat Conf"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2004.1347933"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.884166"},{"key":"ref19","first-page":"294","article-title":"variability driven gate sizing for binning yield optimization","author":"davoodi","year":"2005","journal-title":"Proc Design Automat Conf"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1016\/0165-0114(90)90156-Z"},{"key":"ref4","first-page":"326","article-title":"tilos : a posynomial programming approach to transistor sizing","author":"fishburn","year":"1985","journal-title":"Proc Int Conf Comput -Aided Design"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/HICSS.1995.375413"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2002.1012594"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ICVD.2004.1260924"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1287\/mnsc.17.4.B141"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/43.248073"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/92.645073"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2002.1167564"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/775832.775920"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/43.828549"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2003.1219021"},{"key":"ref20","first-page":"959","article-title":"improving the process-variation tolerance of digital circuits using gate sizing and statistical techniques","author":"neiroukh","year":"2006","journal-title":"Design Automation Test Eur"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2006.4271831"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560213"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.1992.276210"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2007.92"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1016\/S0377-2217(99)00316-1"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2003.159744"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/4570466\/04570469.pdf?arnumber=4570469","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:56:06Z","timestamp":1638219366000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4570469\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,8]]},"references-count":37,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2008.2000597","relation":{},"ISSN":["1063-8210"],"issn-type":[{"value":"1063-8210","type":"print"}],"subject":[],"published":{"date-parts":[[2008,8]]}}}