{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,9,29]],"date-time":"2025-09-29T12:04:53Z","timestamp":1759147493699},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"12","license":[{"start":{"date-parts":[[2008,12,1]],"date-time":"2008-12-01T00:00:00Z","timestamp":1228089600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"},{"start":{"date-parts":[[2008,12,1]],"date-time":"2008-12-01T00:00:00Z","timestamp":1228089600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-029"},{"start":{"date-parts":[[2008,12,1]],"date-time":"2008-12-01T00:00:00Z","timestamp":1228089600000},"content-version":"stm-asf","delay-in-days":0,"URL":"https:\/\/doi.org\/10.15223\/policy-037"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2008,12]]},"DOI":"10.1109\/tvlsi.2008.2001297","type":"journal-article","created":{"date-parts":[[2008,11,25]],"date-time":"2008-11-25T16:23:26Z","timestamp":1227630206000},"page":"1609-1619","source":"Crossref","is-referenced-by-count":31,"title":["Thermal Via Allocation for 3-D ICs Considering Temporally and Spatially Variant Thermal Power"],"prefix":"10.1109","volume":"16","author":[{"given":"Hao","family":"Yu","sequence":"first","affiliation":[{"name":"Berkeley Design Autom., Santa Clara, CA"}]},{"given":"Yiyu","family":"Shi","sequence":"additional","affiliation":[]},{"given":"Lei","family":"He","sequence":"additional","affiliation":[]},{"given":"Tanay","family":"Karnik","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560145"},{"key":"ref11","first-page":"568","article-title":"an electrothermally-aware full-chip substrate temperature gradient evaluation methodology for leakage dominant technologies with implications for power estimation and hot-spot management","author":"lin","year":"2006","journal-title":"Proc Int Conf Comput Aided Des (ICCAD)"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1145\/1233501.1233619"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876103"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2003.1257591"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2004.1382591"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.870069"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560164"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1145\/1123008.1123048"},{"key":"ref19","doi-asserted-by":"crossref","first-page":"732","DOI":"10.1145\/277044.277227","article-title":"Reducing power in high-performance microprocessors","author":"tiwari","year":"1998","journal-title":"Proceedings 1998 Design and Automation Conference 35th DAC (Cat No 98CH36175) DAC"},{"key":"ref28","author":"bazaraa","year":"1993","journal-title":"Nonlinear Programming Theory and Algorithms"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"532","DOI":"10.1109\/MDT.2005.149","article-title":"physical design for 3d system-on-package: challenges and opportunities","volume":"22","author":"lim","year":"2005","journal-title":"IEEE Des Test Comput"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/43.848089"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2005.136"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1999.782207"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/1233501.1233666"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/43.644613"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/S0026-2692(03)00206-4"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.812372"},{"key":"ref2","author":"das","year":"2004","journal-title":"Design automation and analysis of three dimensional integrated circuits"},{"key":"ref9","first-page":"319","article-title":"efficient full-chip thermal modeling and analysis","author":"li","year":"2004","journal-title":"Proc Int Conf Comput Aided Des (ICCAD)"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/5.929647"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"2","DOI":"10.1145\/871656.859620","article-title":"temperature-aware microarchitecture","author":"skadron","year":"2003","journal-title":"Proc Int Symp Comput Arch"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2006.4271828"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.850860"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/43.712097"},{"key":"ref23","author":"grimme","year":"1997","journal-title":"Krylov projection methods for model reduction"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2005.1560174"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.826583"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/4668626\/04668631.pdf?arnumber=4668631","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2024,1,12]],"date-time":"2024-01-12T19:04:09Z","timestamp":1705086249000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/4668631\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2008,12]]},"references-count":29,"journal-issue":{"issue":"12"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2008.2001297","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2008,12]]}}}