{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,9,13]],"date-time":"2023-09-13T19:57:26Z","timestamp":1694635046801},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2009,2,1]],"date-time":"2009-02-01T00:00:00Z","timestamp":1233446400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2009,2]]},"DOI":"10.1109\/tvlsi.2008.2011197","type":"journal-article","created":{"date-parts":[[2009,1,16]],"date-time":"2009-01-16T16:46:19Z","timestamp":1232124379000},"page":"181-193","source":"Crossref","is-referenced-by-count":4,"title":["Quasi-Resonant Interconnects: A Low Power, Low Latency Design Methodology"],"prefix":"10.1109","volume":"17","author":[{"given":"Jonathan","family":"Rosenfeld","sequence":"first","affiliation":[]},{"given":"Eby G.","family":"Friedman","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2005.1469345"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/50.956141"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/T-AIEE.1899.4764066"},{"key":"ref13","year":"1900","journal-title":"Art of reducing attenuation of electrical waves and apparatus therefore"},{"key":"ref14","first-page":"43","article-title":"analysis of transmission line with periodical inductance loading","volume":"10","author":"marin?i?","year":"2004","journal-title":"Microw Rev"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/12.280806"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240902"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISVLSI.2005.74"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.893576"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2006.1696207"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/NEWCAS.2004.1359049"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/92.831439"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.831481"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857351"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2006.283900"},{"key":"ref7","first-page":"319","article-title":"energy efficient signaling in deep submicron cmos technology","author":"ben dhaou","year":"2001","journal-title":"Proc IEEE Int Symp Quality Electron Des"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/92.805751"},{"key":"ref1","year":"2005","journal-title":"?The International Technology Roadmap for Semiconductors (ITRS) ?"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810060"},{"key":"ref20","author":"van valkenburg","year":"1974","journal-title":"Network Analysis"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.841065"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/4749486\/04749252.pdf?arnumber=4749252","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:59:27Z","timestamp":1633910367000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/4749252\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2009,2]]},"references-count":21,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2008.2011197","relation":{},"ISSN":["1063-8210"],"issn-type":[{"value":"1063-8210","type":"print"}],"subject":[],"published":{"date-parts":[[2009,2]]}}}