{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,5]],"date-time":"2026-03-05T15:45:07Z","timestamp":1772725507679,"version":"3.50.1"},"reference-count":30,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2010,7,1]],"date-time":"2010-07-01T00:00:00Z","timestamp":1277942400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2010,7]]},"DOI":"10.1109\/tvlsi.2009.2019758","type":"journal-article","created":{"date-parts":[[2009,9,4]],"date-time":"2009-09-04T14:38:22Z","timestamp":1252075102000},"page":"1067-1080","source":"Crossref","is-referenced-by-count":45,"title":["Adaptive and Deadlock-Free Tree-Based Multicast Routing for Networks-on-Chip"],"prefix":"10.1109","volume":"18","author":[{"given":"Faizal Arya","family":"Samman","sequence":"first","affiliation":[]},{"given":"Thomas","family":"Hollstein","sequence":"additional","affiliation":[]},{"given":"Manfred","family":"Glesner","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2004.03.005"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2004.1269001"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378780"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378782"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378783"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378784"},{"key":"ref15","author":"fox","year":"1990","journal-title":"Fortran D language specification"},{"key":"ref16","author":"merlin","year":"1991","journal-title":"Techniques for the automatic parallelization of distributed Fortran 90"},{"key":"ref17","article-title":"high performance fortran language specification, version 1.0","volume":"2","year":"1993","journal-title":"Sci Program"},{"key":"ref18","year":"2003","journal-title":"MPI-2 Extensions to the Message-Passing Interface"},{"key":"ref19","doi-asserted-by":"crossref","DOI":"10.7551\/mitpress\/5712.001.0001","author":"geist","year":"1994","journal-title":"Pvm Parallel virtual machine A user's guide and tutorial for networked parallel computing"},{"key":"ref28","doi-asserted-by":"crossref","first-page":"278","DOI":"10.1145\/146628.140384","article-title":"the turn model for adaptive routing","author":"glass","year":"1992","journal-title":"Proc 11th Int Symp Comput Archit"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"384","DOI":"10.1016\/j.sysarc.2007.07.006","article-title":"Designing efficient irregular networks for heterogeneous systems-on-chip","volume":"54","author":"neeb","year":"2008","journal-title":"J Syst Arch"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2002.1044298"},{"key":"ref27","doi-asserted-by":"crossref","first-page":"65","DOI":"10.1016\/j.sysarc.2003.07.003","article-title":"interconnect intellectual property for network-on-chip (noc)","volume":"50","author":"liu","year":"2004","journal-title":"J Syst Arch"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20045100"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ICDCS.1992.235060"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20045016"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/NANONET.2006.346219"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1049\/ip-cdt:20030830"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/71.298203"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378779"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2007.4378787"},{"key":"ref20","article-title":"pvm and mpi: a comparison of features","volume":"8","author":"geist","year":"1996","journal-title":"Calculateurs Paralleles"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/71.689441"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/71.466634"},{"key":"ref24","first-page":"186","article-title":"an efficient implementation of tree-based multicast routing for distributed shared-memory multiprocessors","author":"malumbres","year":"1996","journal-title":"Proc 8th IEEE Symp Parallel and Distributed Process"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1006\/jpdc.1996.0074"},{"key":"ref26","first-page":"1","article-title":"connection-oriented multicasting in wormhole-switched network-on-chip","volume":"6","author":"lu","year":"2006","journal-title":"Proc IEEE Computer Soc Annu Symp VLSI (ISVLSI)"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/12.936232"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/5491361\/05229348.pdf?arnumber=5229348","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:51:41Z","timestamp":1633909901000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5229348\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2010,7]]},"references-count":30,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2009.2019758","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2010,7]]}}}