{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,8,29]],"date-time":"2024-08-29T07:12:08Z","timestamp":1724915528477},"reference-count":9,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2011,5,1]],"date-time":"2011-05-01T00:00:00Z","timestamp":1304208000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2011,5]]},"DOI":"10.1109\/tvlsi.2010.2042184","type":"journal-article","created":{"date-parts":[[2010,3,12]],"date-time":"2010-03-12T13:55:32Z","timestamp":1268402132000},"page":"909-914","source":"Crossref","is-referenced-by-count":9,"title":["An Enhanced Canary-Based System With BIST for SRAM Standby Power Reduction"],"prefix":"10.1109","volume":"19","author":[{"given":"Jiajing","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Alexander","family":"Hoefler","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Benton H.","family":"Calhoun","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","first-page":"324","article-title":"A 1.1 GHz 12 <ref_formula><tex Notation=\"TeX\">$\\mu{\\rm A\/Mb}$<\/tex> <\/ref_formula>-leakage SRAM design in 65 nm ultra-low-power CMOS with integrated leakage reduction for mobile applications","author":"wang","year":"2007","journal-title":"Proc ISSCC"},{"key":"ref3","first-page":"55","article-title":"SRAM leakage suppression by minimizing standby supply voltage","author":"qin","year":"2004","journal-title":"Proc Int Symp Quality Electron Des (ISQED)"},{"key":"ref6","first-page":"29","article-title":"Canary replica feedback for near-DRV standby <ref_formula><tex Notation=\"TeX\">${\\rm V}_{\\rm DD}$<\/tex> <\/ref_formula> scaling in a 90 nm SRAM","author":"wang","year":"2007","journal-title":"Proc CICC"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2000.852648"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2008.4479693"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2005814"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2004.1349307"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1979.1051221"},{"key":"ref1","doi-asserted-by":"crossref","first-page":"148","DOI":"10.1109\/ISCA.2002.1003572","article-title":"Drowsy caches: Simple techniques for reducing leakage power","author":"flautner","year":"2002","journal-title":"Proc Int Symp Comput Arch"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/5755591\/05428790.pdf?arnumber=5428790","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T01:37:15Z","timestamp":1633916235000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5428790\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,5]]},"references-count":9,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2010.2042184","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,5]]}}}