{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,10,27]],"date-time":"2025-10-27T10:37:38Z","timestamp":1761561458845},"reference-count":20,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2011,10,1]],"date-time":"2011-10-01T00:00:00Z","timestamp":1317427200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2011,10]]},"DOI":"10.1109\/tvlsi.2010.2059054","type":"journal-article","created":{"date-parts":[[2010,8,18]],"date-time":"2010-08-18T14:50:34Z","timestamp":1282143034000},"page":"1911-1916","source":"Crossref","is-referenced-by-count":25,"title":["Statistical Design Optimization of FinFET SRAM Using Back-Gate Voltage"],"prefix":"10.1109","volume":"19","author":[{"given":"Behzad","family":"Ebrahimi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masoud","family":"Rostami","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Ali","family":"Afzali-Kusha","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Massoud","family":"Pedram","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCCE.2008.4580730"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/16.902730"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2003.1233677"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/4.68126"},{"key":"ref14","year":"2005","journal-title":"Sentaurus Device Simulator Version X-2005 10"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TED.2007.893669"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2003.822661"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.852295"},{"key":"ref18","first-page":"25","article-title":"Energy\/power breakdown of pipelined nanometer caches (90 nm\/65 nm\/45 nm\/32 nm)","author":"rodriguez","year":"2006","journal-title":"Proc ISLPED"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/SISPAD.2009.5290234"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.906995"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2016633"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1077603.1077607"},{"key":"ref5","first-page":"118","article-title":"FinFET-a quasi-planar double-gate MOSFET","author":"tang","year":"2001","journal-title":"ISSCC Dig Techn Papers"},{"key":"ref8","first-page":"2778","article-title":"Sub-1 V, robust and compact 6T SRAM cell in double gate MOS technology","author":"thomas","year":"2007","journal-title":"Proc ISCAS"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.896320"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.909792"},{"key":"ref1","year":"2009","journal-title":"International Technology Roadmap for Semiconductors"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2009.2021075"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/CEC.2001.934374"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/5978256\/05546969.pdf?arnumber=5546969","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,11]],"date-time":"2021-10-11T00:44:01Z","timestamp":1633913041000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5546969\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2011,10]]},"references-count":20,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2010.2059054","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2011,10]]}}}