{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,4,9]],"date-time":"2026-04-09T14:33:30Z","timestamp":1775745210866,"version":"3.50.1"},"reference-count":7,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2012,4,1]],"date-time":"2012-04-01T00:00:00Z","timestamp":1333238400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2012,4]]},"DOI":"10.1109\/tvlsi.2011.2109971","type":"journal-article","created":{"date-parts":[[2011,3,2]],"date-time":"2011-03-02T04:43:39Z","timestamp":1299041019000},"page":"737-741","source":"Crossref","is-referenced-by-count":11,"title":["PVT Variation Tolerant Current Source With On-Chip Digital Self-Calibration"],"prefix":"10.1109","volume":"20","author":[{"given":"Moo-Young","family":"Kim","sequence":"first","affiliation":[]},{"given":"Hokyu","family":"Lee","sequence":"additional","affiliation":[]},{"given":"Chulwoo","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TBME.2004.839797"},{"key":"ref3","first-page":"511","article-title":"A 9-bit configurable current source with enhanced output resistance for cochlear stimulators","author":"guo","year":"2008","journal-title":"Proc IEEE Custom Intergr Circuits Conf"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2050915"},{"key":"ref5","author":"razavi","year":"2001","journal-title":"Design of Analog CMOS Integrated Circuits"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1977.1050882"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.597305"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4.324"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6168597\/05720543.pdf?arnumber=5720543","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:52:22Z","timestamp":1633909942000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5720543\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,4]]},"references-count":7,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2011.2109971","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,4]]}}}