{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,13]],"date-time":"2026-03-13T13:14:02Z","timestamp":1773407642645,"version":"3.50.1"},"reference-count":8,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2012,1,1]],"date-time":"2012-01-01T00:00:00Z","timestamp":1325376000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2012,1]]},"DOI":"10.1109\/tvlsi.2011.2120635","type":"journal-article","created":{"date-parts":[[2011,3,17]],"date-time":"2011-03-17T20:05:27Z","timestamp":1300392327000},"page":"176-181","source":"Crossref","is-referenced-by-count":21,"title":["Robust Secure Scan Design Against Scan-Based Differential Cryptanalysis"],"prefix":"10.1109","volume":"20","author":[{"given":"Youhua","family":"Shi","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Nozomu","family":"Togawa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Masao","family":"Yanagisawa","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tatsuo","family":"Ohtsuki","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2007.906483"},{"key":"ref3","first-page":"407","article-title":"Scan-based attack against elliptic curve cryptosystems","author":"nara","year":"2010","journal-title":"Proc IEEE ASP-DAC"},{"key":"ref6","first-page":"55","volume":"108","author":"atobe","year":"2008","journal-title":"Dynamically variable secure scan architecture against scan-based side channel attack on cryptography LSIs"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-540-89754-5_18"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"219","DOI":"10.1109\/OLT.2004.1319691","article-title":"Scan design and secure chip","author":"hely","year":"2004","journal-title":"Proc Int On-Line Test Symp"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2009.5355900"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.862745"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2004.1386969"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6099858\/05734887.pdf?arnumber=5734887","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:52:52Z","timestamp":1633909972000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5734887\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,1]]},"references-count":8,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2011.2120635","relation":{},"ISSN":["1063-8210"],"issn-type":[{"value":"1063-8210","type":"print"}],"subject":[],"published":{"date-parts":[[2012,1]]}}}