{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,22]],"date-time":"2024-07-22T11:55:40Z","timestamp":1721649340306},"reference-count":11,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"5","license":[{"start":{"date-parts":[[2012,5,1]],"date-time":"2012-05-01T00:00:00Z","timestamp":1335830400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2012,5]]},"DOI":"10.1109\/tvlsi.2011.2130546","type":"journal-article","created":{"date-parts":[[2011,4,8]],"date-time":"2011-04-08T20:21:11Z","timestamp":1302294071000},"page":"964-968","source":"Crossref","is-referenced-by-count":8,"title":["An Adaptive Equalizer With the Capacitance Multiplication for DisplayPort Main Link in 0.18-$\\mu$m CMOS"],"prefix":"10.1109","volume":"20","author":[{"given":"Won-Young","family":"Lee","sequence":"first","affiliation":[]},{"given":"Lee-Sup","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2050231"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.822774"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.814416"},{"key":"ref6","year":"2007","journal-title":"DisplayPort Standard"},{"key":"ref11","year":"2006","journal-title":"Varactor"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2009.2023299"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1049\/el:20030086"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.818917"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.903076"},{"key":"ref9","first-page":"123","author":"razavi","year":"2002","journal-title":"Design of Integrated Circuits for Optical Communications"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.1996.488559"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6178142\/05746557.pdf?arnumber=5746557","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:50:23Z","timestamp":1633909823000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5746557\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,5]]},"references-count":11,"journal-issue":{"issue":"5"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2011.2130546","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,5]]}}}