{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,9]],"date-time":"2026-01-09T15:52:56Z","timestamp":1767973976940,"version":"3.49.0"},"reference-count":11,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2012,10,1]],"date-time":"2012-10-01T00:00:00Z","timestamp":1349049600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2012,10]]},"DOI":"10.1109\/tvlsi.2011.2163205","type":"journal-article","created":{"date-parts":[[2011,8,25]],"date-time":"2011-08-25T20:38:35Z","timestamp":1314304715000},"page":"1909-1913","source":"Crossref","is-referenced-by-count":32,"title":["A Low-Power Ternary Content Addressable Memory With Pai-Sigma Matchlines"],"prefix":"10.1109","volume":"20","author":[{"given":"Shun-Hsun","family":"Yang","sequence":"first","affiliation":[]},{"given":"Yu-Jen","family":"Huang","sequence":"additional","affiliation":[]},{"given":"Jin-Fu","family":"Li","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/MM.2005.73"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.837979"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2005.95"},{"key":"ref6","first-page":"1","article-title":"A 256 <ref_formula><tex Notation=\"TeX\">$\\times$<\/tex> <\/ref_formula> 128 energy-efficient TCAM with novel low power schemes","author":"huang","year":"2007","journal-title":"Proc IEEE Int Symp VLSI Design Autom Test (VLSI-TSA-DAT)"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.872719"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914330"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.824298"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1997.621492"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.818139"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.852028"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.864128"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6246737\/05993479.pdf?arnumber=5993479","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,10,10]],"date-time":"2021-10-10T23:49:05Z","timestamp":1633909745000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/5993479\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2012,10]]},"references-count":11,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2011.2163205","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2012,10]]}}}