{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,7,1]],"date-time":"2025-07-01T05:46:31Z","timestamp":1751348791755},"reference-count":16,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2013,2,1]],"date-time":"2013-02-01T00:00:00Z","timestamp":1359676800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2013,2]]},"DOI":"10.1109\/tvlsi.2012.2186157","type":"journal-article","created":{"date-parts":[[2012,2,23]],"date-time":"2012-02-23T21:00:00Z","timestamp":1330030800000},"page":"206-216","source":"Crossref","is-referenced-by-count":19,"title":["A Unified Graphics and Vision Processor With a 0.89 \/spl mu\/W\/fps Pose Estimation Engine for Augmented Reality"],"prefix":"10.1109","volume":"21","author":[{"family":"Jae-Sung Yoon","sequence":"first","affiliation":[]},{"family":"Jeong-Hyun Kim","sequence":"additional","affiliation":[]},{"family":"Hyo-Eun Kim","sequence":"additional","affiliation":[]},{"family":"Won-Young Lee","sequence":"additional","affiliation":[]},{"family":"Seok-Hoon Kim","sequence":"additional","affiliation":[]},{"family":"Kyusik Chung","sequence":"additional","affiliation":[]},{"family":"Jun-Seok Park","sequence":"additional","affiliation":[]},{"family":"Lee-Sup Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/IWAR.1999.803809"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/34.862199"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/MCG.2009.46"},{"key":"ref13","year":"2000","journal-title":"OpenGL ES 2 0"},{"key":"ref14","year":"1968","journal-title":"Opencv"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/IISWC.2009.5306794"},{"key":"ref16","year":"1993","journal-title":"FX Composer"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007157"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1007\/11559573_147"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031768"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2007158"},{"key":"ref8","first-page":"539","article-title":"A 3D graphics processor with fast 4D vector inner product units and power aware texture cache","author":"yoon","year":"2008","journal-title":"Proc CICC"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.909328"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1145\/1101149.1101334"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ISMAR.2007.4538819"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.905242"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6414677\/06156811.pdf?arnumber=6156811","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:56:13Z","timestamp":1638219373000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6156811\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,2]]},"references-count":16,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2012.2186157","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,2]]}}}