{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,4,23]],"date-time":"2025-04-23T05:28:06Z","timestamp":1745386086015},"reference-count":34,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2013,6,1]],"date-time":"2013-06-01T00:00:00Z","timestamp":1370044800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2013,6]]},"DOI":"10.1109\/tvlsi.2012.2204782","type":"journal-article","created":{"date-parts":[[2012,7,10]],"date-time":"2012-07-10T20:58:17Z","timestamp":1341953897000},"page":"1143-1153","source":"Crossref","is-referenced-by-count":9,"title":["Asynchronous Fine-Grain Power-Gated Logic"],"prefix":"10.1109","volume":"21","author":[{"given":"Meng-Chou","family":"Chang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei-Hsiang","family":"Chang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/4.98986"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref31","first-page":"1375","article-title":"Low power adiabatic logic circuits with feedback structure using three-phase power supply","author":"hu","year":"2005","journal-title":"Proc Int Conf Commun Circuits Syst"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.836320"},{"key":"ref34","year":"2006","journal-title":"Predictive Technology Model (PTM)"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TIM.2010.2044710"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/92.736125"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/92.748196"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/4.400426"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2000.852696"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/4.871328"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870761"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.1996.510510"},{"key":"ref18","first-page":"679","article-title":"Zigzag super cut-off CMOS (ZSCCMOS) scheme with self-saturated virtual power lines for subthreshold-leakage-suppressed sub-1-v-vdd LSI's","author":"min","year":"2002","journal-title":"Proc Eur Solid-State Circuits Conf"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.63"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/224081.224115"},{"key":"ref4","doi-asserted-by":"crossref","first-page":"239","DOI":"10.1109\/LPE.1998.708195","article-title":"Estimation of standby leakage power in CMOS circuit considering accurate modeling of transistor stacks","author":"zhanping chen","year":"1998","journal-title":"Proceedings 1998 International Symposium on Low Power Electronics and Design (IEEE Cat No 98TH8379) LPE"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/4.499727"},{"key":"ref3","year":"2011","journal-title":"International Technology Roadmap for Semiconductor 2010 Update Overview"},{"key":"ref6","first-page":"88","article-title":"A sub-0.1 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/formula> circuit design with substrate-over-biasing","author":"oowaki","year":"1998","journal-title":"Proc IEEE Int Solid-State Circuits Conf"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/ASIC.2001.954699"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2001.945400"},{"key":"ref8","doi-asserted-by":"crossref","first-page":"116","DOI":"10.1145\/871506.871537","article-title":"Optimal body bias selection for leakage improvement and process compensation over different technology generations","author":"neau","year":"2003","journal-title":"Proc Int Symp Low Power Electron Design"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803949"},{"key":"ref2","author":"weste","year":"2010","journal-title":"CMOS VLSI Design A Circuits and Systems Perspective"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.870796"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2002.808156"},{"key":"ref20","author":"keating","year":"2007","journal-title":"Low Power Methodology Manual For System-on-Chip Design"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2008.17"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2010.18"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2007.378651"},{"key":"ref23","first-page":"3162","article-title":"Fine-grained power gating for leakage and short-circuit power reduction by using asynchronous-logic","author":"lin","year":"2009","journal-title":"Proc IEEE Int Symp Circuits Syst"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2009.5236039"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.813248"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6517540\/06236207.pdf?arnumber=6236207","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:56:16Z","timestamp":1638219376000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6236207\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,6]]},"references-count":34,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2012.2204782","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,6]]}}}