{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,3,29]],"date-time":"2022-03-29T08:06:20Z","timestamp":1648541180149},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2013,11,1]],"date-time":"2013-11-01T00:00:00Z","timestamp":1383264000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2013,11]]},"DOI":"10.1109\/tvlsi.2012.2227068","type":"journal-article","created":{"date-parts":[[2012,12,12]],"date-time":"2012-12-12T19:12:34Z","timestamp":1355339554000},"page":"2080-2093","source":"Crossref","is-referenced-by-count":1,"title":["10\u2013315-MHz Cascaded Hybrid Phase-Locked Loop for Pixel Clock Generation"],"prefix":"10.1109","volume":"21","author":[{"given":"Minyoung","family":"Song","sequence":"first","affiliation":[]},{"given":"Young-Ho","family":"Kwak","sequence":"additional","affiliation":[]},{"given":"Sunghoon","family":"Ahn","sequence":"additional","affiliation":[]},{"given":"Hojin","family":"Park","sequence":"additional","affiliation":[]},{"given":"Chulwoo","family":"Kim","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"2402","article-title":"A PVT-tolerant low-1\/f noise dual-loop hybrid PLL in 0.18 <formula formulatype=\"inline\"><tex Notation=\"TeX\">$\\mu{\\rm m}$<\/tex><\/formula>","author":"lee","year":"2006","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2008.4672162"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCE.2008.4560135"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCOM.1980.1094619"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2056013"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2003.819128"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2005.846307"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2007.906171"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1996.542317"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803935"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.874273"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2004.1332807"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.826333"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.857417"},{"key":"ref8","first-page":"344","article-title":"A 3 GHz fractional-N all-digital PLL with precise time-to-digital converter calibration and mismatch correction","author":"weltin-wu","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2008.4523126"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807405"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320966"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2056011"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/4.766813"},{"key":"ref21","first-page":"243","article-title":"A 10 MHz to 315 MHz cascaded hybrid PLL with piecewise linear calibrated TDC","author":"song","year":"2009","journal-title":"Proc IEEE Custom Integr Circuits Conf"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6606858\/06380633.pdf?arnumber=6380633","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:54:46Z","timestamp":1638219286000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6380633\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2013,11]]},"references-count":21,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2012.2227068","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2013,11]]}}}