{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,12,30]],"date-time":"2025-12-30T08:52:00Z","timestamp":1767084720242},"reference-count":18,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,1]]},"DOI":"10.1109\/tvlsi.2012.2236113","type":"journal-article","created":{"date-parts":[[2013,1,17]],"date-time":"2013-01-17T19:04:33Z","timestamp":1358449473000},"page":"27-38","source":"Crossref","is-referenced-by-count":9,"title":["Stability Estimation of a 6T-SRAM Cell Using a Nonlinear Regression"],"prefix":"10.1109","volume":"22","author":[{"given":"Henry","family":"Park","sequence":"first","affiliation":[]},{"given":"Chih-Kong Ken","family":"Yang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","first-page":"42","article-title":"Large-scale read\/write margin measurement in 45 nm CMOS SRAM arrays","author":"guo","year":"2008","journal-title":"Proc Symp VLSI Circuits Dig"},{"key":"ref11","first-page":"354","article-title":"SRAM stability characterization using tunable ring oscillators in 45 nm CMOS","author":"tsai","year":"2010","journal-title":"Proc IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1979.1051221"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164300"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2008.2001941"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TSM.2008.2004329"},{"key":"ref16","author":"seber","year":"2004","journal-title":"Multivariate Observations"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.909792"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.803949"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052809"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/4.913744"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630041"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.917506"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.883344"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2006.229167"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1989.572629"},{"key":"ref1","first-page":"131","article-title":"45 nm transistor reliability","volume":"12","author":"hicks","year":"2008","journal-title":"International Journal of Technology"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2032698"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6690268\/06414668.pdf?arnumber=6414668","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:54:47Z","timestamp":1638219287000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6414668\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1]]},"references-count":18,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2012.2236113","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,1]]}}}