{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,3,2]],"date-time":"2024-03-02T13:00:40Z","timestamp":1709384440030},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2014,1,1]],"date-time":"2014-01-01T00:00:00Z","timestamp":1388534400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,1]]},"DOI":"10.1109\/tvlsi.2012.2236658","type":"journal-article","created":{"date-parts":[[2013,1,25]],"date-time":"2013-01-25T19:02:12Z","timestamp":1359140532000},"page":"136-145","source":"Crossref","is-referenced-by-count":5,"title":["Power-Planning-Aware Soft Error Hardening via Selective Voltage Assignment"],"prefix":"10.1109","volume":"22","author":[{"given":"Kai-Chiang","family":"Wu","sequence":"first","affiliation":[]},{"given":"Diana","family":"Marculescu","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2009139"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2006.229323"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876104"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1007\/s10836-009-5103-9"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1982.1585498"},{"key":"ref15","first-page":"111","article-title":"A model for transient fault propagation in combinational logic","author":"omana","year":"2003","journal-title":"Proc Int Online Test Symp"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.882592"},{"key":"ref17","first-page":"559","article-title":"Soft error rate reduction using redun-dancy addition and removal","author":"wu","year":"2008","journal-title":"Proc Asia and South Pacific Design Automation Conf"},{"key":"ref18","first-page":"301","article-title":"Power-aware soft error hardening via selective voltage scaling","author":"wu","year":"2008","journal-title":"Proc Int Conf Comput Design"},{"key":"ref19","first-page":"788","article-title":"Pushing ASIC performance in a power envelope","author":"stok","year":"2003","journal-title":"Proc Design Automat Conf"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2005.853696"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2003.1271075"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2011.5770790"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2008.2003268"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1640457.1640462"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2006.82"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2002.1028924"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TDSC.2004.14"},{"key":"ref9","first-page":"1","article-title":"Seamless integration of SER in rewiring-based design space exploration","author":"almukhaizim","year":"2006","journal-title":"Proc Int Test Conf"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"690","DOI":"10.1109\/TCAD.2009.2013997","article-title":"Voltage-island partitioning and floorplanning under timing constraints","volume":"28","author":"lee","year":"2009","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2196279"},{"key":"ref21","first-page":"51","article-title":"Voltage-island driven floorplan-ning considering level-shifter positions","author":"yu","year":"2009","journal-title":"Proc Great Lakes Symp Very Large Scale Integration (VLSI)"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx5\/92\/6690268\/06421010.pdf?arnumber=6421010","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2021,11,29]],"date-time":"2021-11-29T20:54:47Z","timestamp":1638219287000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6421010\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,1]]},"references-count":22,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2012.2236658","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,1]]}}}