{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,15]],"date-time":"2026-03-15T00:45:37Z","timestamp":1773535537314,"version":"3.50.1"},"reference-count":45,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"6","license":[{"start":{"date-parts":[[2014,6,1]],"date-time":"2014-06-01T00:00:00Z","timestamp":1401580800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Intelligence Advanced Research Projects Agency via the Department of Interior National Business Center"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,6]]},"DOI":"10.1109\/tvlsi.2013.2269869","type":"journal-article","created":{"date-parts":[[2013,7,22]],"date-time":"2013-07-22T18:04:28Z","timestamp":1374516268000},"page":"1350-1363","source":"Crossref","is-referenced-by-count":21,"title":["FTQLS: Fault-Tolerant Quantum Logic Synthesis"],"prefix":"10.1109","volume":"22","author":[{"given":"Chia-Chun","family":"Lin","sequence":"first","affiliation":[]},{"given":"Amlan","family":"Chakrabarti","sequence":"additional","affiliation":[]},{"given":"Niraj K.","family":"Jha","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","first-page":"867","article-title":"Constructing arbitrary Steane code single logical qubit fault-tolerant gates","volume":"11","author":"fowler","year":"2011","journal-title":"Quantum Inf Comput"},{"key":"ref38","first-page":"81","article-title":"The Solovay-Kitaev algorithm","volume":"6","author":"dawson","year":"2006","journal-title":"Quantum Inf Comput"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.32.3266"},{"key":"ref32","first-page":"47","author":"fredkin","year":"2002","journal-title":"Conservative Logic"},{"key":"ref31","first-page":"632","article-title":"Reversible computing","author":"toffoli","year":"0","journal-title":"Proc Colloq Autom Lang Program"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1145\/1330521.1330523"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2013.2244643"},{"key":"ref36","first-page":"262","article-title":"Block-based quantum-logic synthesis","volume":"11","author":"saeedi","year":"2011","journal-title":"Quantum Inf Comput"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2005.1466172"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.52.3457"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevB.76.035315"},{"key":"ref40","author":"booth","year":"2012","journal-title":"Quantum compiler optimizations"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.91.167005"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1038\/nature08121"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"350","DOI":"10.1063\/1.1928869","article-title":"Quantum information processing with trapped ions","volume":"770","author":"barrett","year":"0","journal-title":"Proc AIP Conf"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.6028\/jres.103.019"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.72.022347"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1103\/RevModPhys.82.2313"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.70.062302"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1088\/1367-2630\/9\/7\/224"},{"key":"ref19","first-page":"30101-1","article-title":"Conditional preparation of maximal polarization entanglement","volume":"67","author":"?liwa","year":"2003","journal-title":"Phys Rev A"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1145\/1278349.1278355"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevLett.77.793"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2431211.2431220"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/359340.359342"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1038\/nature03350"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2004.836735"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.73.012340"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.83.020302"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.80.052312"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1137\/S0097539795293172"},{"key":"ref9","first-page":"607","article-title":"Fast and efficient exact synthesis of single qubit unitaries generated by Clifford and T gates","volume":"13","author":"kliuchnikov","year":"2013","journal-title":"Quantum Inf Comput"},{"key":"ref1","author":"nielsen","year":"2000","journal-title":"Quantum Computation and Quantum Information"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1088\/1464-4266\/7\/7\/002"},{"key":"ref45","first-page":"175","article-title":"Circuit for Shor's algorithm using $2n+{3}$ qubits","volume":"3","author":"beauregard","year":"2003","journal-title":"Quantum Inf Comput"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2227518"},{"key":"ref21","year":"2009","journal-title":"Quantum Computation Roadmap"},{"key":"ref42","year":"2011","journal-title":"R2011a"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2009.2017215"},{"key":"ref41","author":"preskill","year":"1997","journal-title":"Fault Tolerant Quantum Computation"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2003.811448"},{"key":"ref44","author":"draper","year":"2000","journal-title":"Addition on a Quantum Computer"},{"key":"ref26","article-title":"RMDDS: Reed–Muller decision diagram synthesis of reversible logic circuits","author":"lin","year":"2012","journal-title":"ACM J Emerg Technol Comput Syst"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1103\/PhysRevA.54.147"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2006.871622"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/6819107\/06565421.pdf?arnumber=6565421","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:18:00Z","timestamp":1642004280000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6565421\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,6]]},"references-count":45,"journal-issue":{"issue":"6"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2013.2269869","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,6]]}}}