{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2023,1,31]],"date-time":"2023-01-31T03:26:30Z","timestamp":1675135590301},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2014,7,1]],"date-time":"2014-07-01T00:00:00Z","timestamp":1404172800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,7]]},"DOI":"10.1109\/tvlsi.2013.2272587","type":"journal-article","created":{"date-parts":[[2013,7,31]],"date-time":"2013-07-31T18:02:19Z","timestamp":1375293739000},"page":"1630-1634","source":"Crossref","is-referenced-by-count":23,"title":["STT-MRAM Sensing Circuit With Self-Body Biasing in Deep Submicron Technologies"],"prefix":"10.1109","volume":"22","author":[{"given":"Jisu","family":"Kim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kyungho","family":"Ryu","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jung Pill","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seung H.","family":"Kang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seong-Ook","family":"Jung","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2012.6187506"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1147\/rd.391.0245"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.909751"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1002\/cta.667"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.810054"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/383082.383135"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2005.1609379"},{"key":"ref17","first-page":"1","article-title":"MRAM at everspin technologies","author":"toggle","year":"0","journal-title":"Proc Non-Volatile Memories Workshop"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2007.4418898"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2010.2075920"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2088143"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E93.C.912"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2004.842903"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.604077"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1002\/cta.635"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/MCD.2002.1035347"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ISSCC.2010.5433943"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/6841655\/06572854.pdf?arnumber=6572854","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:17:31Z","timestamp":1642004251000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6572854\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,7]]},"references-count":17,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2013.2272587","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,7]]}}}