{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,11,18]],"date-time":"2025-11-18T12:16:09Z","timestamp":1763468169876,"version":"3.37.3"},"reference-count":26,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"7","license":[{"start":{"date-parts":[[2014,7,1]],"date-time":"2014-07-01T00:00:00Z","timestamp":1404172800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"High-Tech Research and Development (863) Program"},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61204032","61271269"],"award-info":[{"award-number":["61204032","61271269"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]},{"name":"National Science and Technology Major Project"},{"name":"International Cooperation from ROHM Inc."}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,7]]},"DOI":"10.1109\/tvlsi.2013.2275740","type":"journal-article","created":{"date-parts":[[2013,8,23]],"date-time":"2013-08-23T18:01:48Z","timestamp":1377280908000},"page":"1491-1505","source":"Crossref","is-referenced-by-count":38,"title":["PaCC: A Parallel Compare and Compress Codec for Area Reduction in Nonvolatile Processors"],"prefix":"10.1109","volume":"22","author":[{"given":"Yiqun","family":"Wang","sequence":"first","affiliation":[]},{"given":"Yongpan","family":"Liu","sequence":"additional","affiliation":[]},{"given":"Shuangchen","family":"Li","sequence":"additional","affiliation":[]},{"given":"Xiao","family":"Sheng","sequence":"additional","affiliation":[]},{"given":"Daming","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Mei-Fang","family":"Chiang","sequence":"additional","affiliation":[]},{"given":"Baiko","family":"Sai","sequence":"additional","affiliation":[]},{"given":"Xiaobo Sharon","family":"Hu","sequence":"additional","affiliation":[]},{"given":"Huazhong","family":"Yang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"doi-asserted-by":"publisher","key":"ref10","DOI":"10.1109\/ISVLSI.2012.82"},{"year":"2011","journal-title":"Roadmap for Nonvolatile Memory","key":"ref11"},{"doi-asserted-by":"publisher","key":"ref12","DOI":"10.1109\/DTIS.2006.1708702"},{"doi-asserted-by":"publisher","key":"ref13","DOI":"10.1109\/JSSC.2009.2023192"},{"doi-asserted-by":"publisher","key":"ref14","DOI":"10.1145\/1815961.1816012"},{"year":"2008","journal-title":"Rohm Develops Non-Volatile Register Slashes Dissipation","key":"ref15"},{"doi-asserted-by":"publisher","key":"ref16","DOI":"10.1109\/ICGCS.2010.5542984"},{"doi-asserted-by":"publisher","key":"ref17","DOI":"10.1109\/IEDM.2008.4796679"},{"doi-asserted-by":"publisher","key":"ref18","DOI":"10.1109\/JRPROC.1952.273898"},{"doi-asserted-by":"publisher","key":"ref19","DOI":"10.1109\/DCC.1991.213344"},{"doi-asserted-by":"publisher","key":"ref4","DOI":"10.1109\/ESSCIRC.2012.6341281"},{"doi-asserted-by":"publisher","key":"ref3","DOI":"10.1109\/DSNW.2011.5958839"},{"year":"2007","journal-title":"Rohm Demonstrates Nonvolatile CPU","key":"ref6"},{"key":"ref5","first-page":"192","article-title":"A 3.4 pJ FeRAM-enabled D flip-flop in 0.13 $\\mu{\\rm m}$ CMOS for nonvolatile processing in digital systems","author":"qazi","year":"0","journal-title":"Proc ISSCC"},{"year":"2009","journal-title":"Datasheet of MSP430F522X Mixed Signal Microprocessors","key":"ref8"},{"doi-asserted-by":"publisher","key":"ref7","DOI":"10.1109\/TMAG.2011.2150238"},{"key":"ref2","first-page":"334","article-title":"An 82 $\\mu{\\rm A}\/{\\rm MHZ}$ microcontroller with embedded FeRAM for energy-harvesting applications","author":"zwerg","year":"0","journal-title":"Proc ISSCC"},{"year":"2012","journal-title":"Datasheet of AT91SAM9G20-AT91 ARM Thumb Microcontrollers Atmel","key":"ref9"},{"doi-asserted-by":"publisher","key":"ref1","DOI":"10.1145\/2184512.2184574"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"337","DOI":"10.1049\/cp:20080685","article-title":"A hardware implementation of a run length encoding compression algorithm with parallel inputs","author":"trein","year":"2008","journal-title":"IET Irish Signals and Systems Conference (ISSC 2008) ISSC"},{"key":"ref22","first-page":"1519","article-title":"A compression-based area-efficient recovery architecture for nonvolatile processors","author":"wang","year":"0","journal-title":"Proc DATE"},{"doi-asserted-by":"publisher","key":"ref21","DOI":"10.1109\/TIT.1983.1056728"},{"year":"2006","journal-title":"Benchmark Applications for Synthesizeable VHDL Model","key":"ref24"},{"key":"ref23","first-page":"871","article-title":"Efficient algorithms for the longest path problem","author":"uehara","year":"2005","journal-title":"Algorithms and Computation"},{"year":"2009","journal-title":"Z-Stack&#x2014;ZigBee Protocol Stack","key":"ref26"},{"doi-asserted-by":"publisher","key":"ref25","DOI":"10.1109\/WWC.2001.990739"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/6841655\/06585820.pdf?arnumber=6585820","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:17:31Z","timestamp":1642004251000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6585820\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,7]]},"references-count":26,"journal-issue":{"issue":"7"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2013.2275740","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2014,7]]}}}