{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,22]],"date-time":"2024-07-22T11:56:29Z","timestamp":1721649389216},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2014,10,1]],"date-time":"2014-10-01T00:00:00Z","timestamp":1412121600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,10]]},"DOI":"10.1109\/tvlsi.2013.2287261","type":"journal-article","created":{"date-parts":[[2013,11,19]],"date-time":"2013-11-19T18:53:11Z","timestamp":1384887191000},"page":"2164-2175","source":"Crossref","is-referenced-by-count":3,"title":["Design and Implementation of a CMOS 4-Bit 12-GS\/s Data Acquisition System-On-Chip"],"prefix":"10.1109","volume":"22","author":[{"given":"Behrooz","family":"Javid","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Payam","family":"Heydari","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/PRIME.2011.5966231"},{"key":"ref11","first-page":"390","article-title":"A 40 GS\/s 6 b ADC in 65 nm CMOS","author":"greshishchev","year":"2010","journal-title":"Proc IEEE ISSCC"},{"key":"ref12","first-page":"268","article-title":"A 7.5-GS\/s 3.8-ENOB 52-mW flash ADC with clock duty cycle control in 65 nm CMOS","author":"chung","year":"2009","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2008.2004326"},{"key":"ref14","first-page":"62","article-title":"A 10 Gb\/s demultiplexer IC in 0.18 $\\mu{\\rm m}$ CMOS using current mode logic with tolerance to the threshold voltage fluctuation","author":"tanabe","year":"2000","journal-title":"Proc ISSCC"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TMTT.2007.902071"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914332"},{"key":"ref17","first-page":"152","article-title":"40 Gb\/s 4:1 MUX\/1:4 DEMUX in 90 nm standard CMOS","author":"kanda","year":"2005","journal-title":"Proc IEEE ISSCC"},{"key":"ref18","doi-asserted-by":"crossref","first-page":"1830","DOI":"10.1109\/JSSC.2003.818297","article-title":"40-Gb\/s 2:1 multiplexer and 1:2 demultiplexer in 120-nm standard CMOS","volume":"38","author":"wohlmuth","year":"2003","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/IMWS.2009.4814922"},{"key":"ref28","year":"2003","journal-title":"Histogram Testing Determines DNL and INL Errors"},{"key":"ref4","first-page":"213","article-title":"A 5-bit 4.2-GS\/s flash ADC in 0.13- $\\mu{\\rm m}$ CMOS","author":"lin","year":"2007","journal-title":"Proc IEEE CICC"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/77.403186"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108125"},{"key":"ref6","first-page":"18","article-title":"A 10.3 Gs\/s 6-bit (5.1 ENOB at Nyquist) time-interleaved\/pipelined ADC using open-loop amplifiers and digital calibration in 90 nm CMOS","author":"nazemi","year":"2008","journal-title":"Proc Symp VLSI Circuits"},{"key":"ref29","year":"2002","journal-title":"Selecting the Optimum Test Tones and Test Equipment for Successful High-Speed ADC Sine Wave Testing"},{"key":"ref5","first-page":"680","article-title":"An encoder for a 5 GS\/s 4-bit flash ADC in 0.18 $\\mu{\\rm m}$ CMOS","author":"sheikhaei","year":"2005","journal-title":"Proc IEEE Can Conf Electr Comput Eng"},{"key":"ref8","first-page":"16","article-title":"A 6-bit 5-GSample\/s Nyquist A\/D converter in 65 nm CMOS","author":"choi","year":"2008","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2013765"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2109511"},{"key":"ref9","first-page":"544","article-title":"A 24 GS\/s 6-bit ADC in 90 nm CMOS","author":"schvan","year":"2008","journal-title":"Proc IEEE ISSCC"},{"key":"ref1","first-page":"416","article-title":"10 GS\/s, 4-bit 1.2 V, design-for-testability ADC and DAC in 0.13 $\\mu{\\rm m}$ CMOS technology","author":"liang","year":"2007","journal-title":"Proc Asian Solid-State Circuits Conf"},{"key":"ref20","first-page":"404","article-title":"An 8.9 mW 25 Gb\/s inductorless 1:4 DEMUX in 90 nm CMOS","author":"sekiguchi","year":"2009","journal-title":"Proc ISOCC"},{"key":"ref22","first-page":"536","article-title":"Design of low voltage ultra high-speed 1:16 DEMUX by 0.18 $\\mu{\\rm m}$ CMOS process","author":"feng","year":"2010","journal-title":"Proc of ICFCC"},{"key":"ref21","first-page":"673","article-title":"A 40-Gb\/s quarter rate CDR with 1:4 demultiplexer in 90-nm CMOS technology","author":"yan","year":"2010","journal-title":"Proc IEEE ICCT"},{"key":"ref24","first-page":"87","article-title":"Fat tree encoder design for ultra-high speed flash A\/D converters","author":"lee","year":"2002","journal-title":"Proc MWSCAS"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ICIINFS.2009.5429846"},{"key":"ref26","first-page":"370","article-title":"A 500 mW digitally calibrated AFE in 65 nm CMOS for 10 Gb\/s serial links over backplane and multimode fiber","author":"cao","year":"2009","journal-title":"Proc IEEE ISSCC"},{"key":"ref25","first-page":"34","article-title":"A 195 mW\/55 mW dual-path receiver AFE for multistandard 8.5-to-11.5 Gb\/s serial links in 40 nm CMOS","author":"zhang","year":"2013","journal-title":"Proc IEEE ISSCC"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/6908070\/06663690.pdf?arnumber=6663690","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:13Z","timestamp":1642004653000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6663690"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,10]]},"references-count":29,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2013.2287261","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,10]]}}}