{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2024,7,8]],"date-time":"2024-07-08T21:19:30Z","timestamp":1720473570475},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2014,11,1]],"date-time":"2014-11-01T00:00:00Z","timestamp":1414800000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"French National Research Agency under the framework of the Enhancement of MRAM Memory Yield and Reliability Project","award":["ANR-10-SEGI-007"],"award-info":[{"award-number":["ANR-10-SEGI-007"]}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2014,11]]},"DOI":"10.1109\/tvlsi.2013.2294080","type":"journal-article","created":{"date-parts":[[2014,1,31]],"date-time":"2014-01-31T17:51:40Z","timestamp":1391190700000},"page":"2326-2335","source":"Crossref","is-referenced-by-count":19,"title":["A Complete Resistive-Open Defect Analysis for Thermally Assisted Switching MRAMs"],"prefix":"10.1109","volume":"22","author":[{"given":"Joao","family":"Azevedo","sequence":"first","affiliation":[]},{"given":"Arnaud","family":"Virazel","sequence":"additional","affiliation":[]},{"given":"Alberto","family":"Bosio","sequence":"additional","affiliation":[]},{"given":"Luigi","family":"Dilillo","sequence":"additional","affiliation":[]},{"given":"Patrick","family":"Girard","sequence":"additional","affiliation":[]},{"given":"Aida","family":"Todri-Sanial","sequence":"additional","affiliation":[]},{"given":"Jeremy","family":"Alvarez-Herault","sequence":"additional","affiliation":[]},{"given":"Ken","family":"Mackay","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1088\/0143-0807\/29\/3\/008"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1147\/rd.501.0025"},{"key":"ref12","author":"savchenko","year":"2003","journal-title":"Method of Writing to Scalable Magnetoresistance Random Access Memory Element"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1063\/1.3259373"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1016\/0304-8853(96)00062-5"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333664"},{"key":"ref16","year":"2008","journal-title":"Spectre User Guide"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2009.25"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.915402"},{"key":"ref3","first-page":"277","article-title":"Testing MRAM for write disturbance fault","author":"su","year":"2006","journal-title":"Proc IEEE Int Test Conf"},{"key":"ref6","first-page":"124","article-title":"MRAM defect analysis and fault modeling","author":"su","year":"2004","journal-title":"Proc Int Test Conf"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2026905"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843856"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2012.6176526"},{"key":"ref2","author":"bruchon","year":"2007","journal-title":"Evaluation Validation and Design of Hybrid CMOS - Non-volatile Emerging Technology Cells for Dynamically Reconfigurable Fine Grain Architecture"},{"key":"ref1","year":"2010","journal-title":"International Technology Roadmap for Semiconductors (ITRS)"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1017\/CBO9780511676208"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/6932540\/06701223.pdf?arnumber=6701223","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:28Z","timestamp":1642004668000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6701223"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2014,11]]},"references-count":17,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2013.2294080","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2014,11]]}}}