{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,29]],"date-time":"2026-09-29T17:38:02Z","timestamp":1790703482005,"version":"4.1.0"},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"4","license":[{"start":{"date-parts":[[2015,4,1]],"date-time":"2015-04-01T00:00:00Z","timestamp":1427846400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100001700","name":"Ministry of Education, Culture, Sports, Science and Technology","doi-asserted-by":"publisher","award":["12020735"],"award-info":[{"award-number":["12020735"]}],"id":[{"id":"10.13039\/501100001700","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Ministry of Economy, Trade and Industry, through the Research and Development Subsidiary Program for Promotion of Academia-industry Cooperation"},{"name":"VLSI Design and Education Center"},{"name":"University of Tokyo through STARC, e-Shuttle Inc., Fujitsu Ltd., Cadence Design Systems Inc., Synopsys Inc., and Mentor Graphics Inc"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2015,4]]},"DOI":"10.1109\/tvlsi.2014.2314685","type":"journal-article","created":{"date-parts":[[2014,4,18]],"date-time":"2014-04-18T19:00:20Z","timestamp":1397847620000},"page":"619-630","source":"Crossref","is-referenced-by-count":27,"title":["Asynchronous Domino Logic Pipeline Design Based on Constructed Critical Data Path"],"prefix":"10.1109","volume":"23","author":[{"given":"Zhengfan","family":"Xia","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Masanori","family":"Hariyama","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Michitaka","family":"Kameyama","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2011.71"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2007.902206"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2009.2019660"},{"key":"ref13","author":"harris","year":"2004","journal-title":"Introduction to CMOS VLSI Design&#x2014;Lecture 9 Circuit Families"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1049\/el.2010.1602"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/HLDVT.2009.5340181"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/EIT.2010.5612100"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6271954"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1587\/transele.E95.C.1434"},{"key":"ref19","author":"sutherland","year":"1999","journal-title":"Logical Effort Designing Fast CMOS Circuits"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2006.875789"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MDT.2007.164"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ASYNC.2011.17"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2004.88"},{"key":"ref8","author":"williams","year":"1991","journal-title":"Self-timed rings and their application to division"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1093\/ietele\/e91-c.9.1419"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4757-3385-3"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2007.911072"},{"key":"ref9","author":"lines","year":"1998","journal-title":"Pipelined Asynchronous Circuits"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/GLSV.1998.665208"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1561\/1000000006"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7063292\/06802427.pdf?arnumber=6802427","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:41:46Z","timestamp":1641987706000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6802427\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,4]]},"references-count":21,"journal-issue":{"issue":"4"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2014.2314685","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,4]]}}}