{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,9,8]],"date-time":"2026-09-08T12:14:12Z","timestamp":1788869652441,"version":"build-2803163510"},"reference-count":17,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"10","license":[{"start":{"date-parts":[[2015,10,1]],"date-time":"2015-10-01T00:00:00Z","timestamp":1443657600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Basic Science Research Program through the Ministry of Education, Science and Technology, National Research Foundation of Korea","award":["2012-0000320"],"award-info":[{"award-number":["2012-0000320"]}]},{"name":"IC Design Education Center, Seoul, Korea"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2015,10]]},"DOI":"10.1109\/tvlsi.2014.2355840","type":"journal-article","created":{"date-parts":[[2014,10,8]],"date-time":"2014-10-08T14:53:12Z","timestamp":1412779992000},"page":"2023-2033","source":"Crossref","is-referenced-by-count":4,"title":["A 9.6-Gb\/s 1.22-mW\/Gb\/s Data-Jitter Mixing Forwarded-Clock Receiver in 65-nm CMOS"],"prefix":"10.1109","volume":"23","author":[{"given":"Sang-Hye","family":"Chung","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Lee-Sup","family":"Kim","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1155\/2011\/982314"},{"key":"ref11","author":"razavi","year":"2011","journal-title":"RF Microelectronics"},{"key":"ref12","first-page":"364","article-title":"A 1.296-to-5.184 Gb\/s transceiver with 2.4 mW\/(Gb\/s) burst-mode CDR using dual-edge injection-locked oscillator","author":"maruko","year":"2010","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref13","first-page":"144","article-title":"1.22 mW\/Gb\/s 9.6 Gb\/s data jitter mixing forwarded-clock receiver robust against power noise with 1.92 ns latency mismatch between data and clock in 65 nm CMOS","author":"chung","year":"2012","journal-title":"IEEE Int Symp VLSI Circuits Dig"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.1015681"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/4.881207"},{"key":"ref16","first-page":"410","article-title":"An 8 Gb\/s 0.65 mW\/Gb\/s forwarded-clock receiver using an ILO with dual feedback loop and quadrature injection scheme","author":"seol","year":"2013","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2239013"},{"key":"ref4","first-page":"82","article-title":"A 5.6 Gb\/s 2.4 mW\/Gb\/s bidirectional link with 8 ns power-on","author":"zerbe","year":"2011","journal-title":"IEEE Int Symp VLSI Circuits Dig"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108120"},{"key":"ref6","first-page":"452","article-title":"A 27 Gb\/s forwarded-clock I\/O receiver using an injection-locked LC-DCO in 45 nm CMOS","author":"o\u2019mahony","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.908692"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2131730"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2022917"},{"key":"ref2","first-page":"459","article-title":"A $8\\times 5$ Gb\/s source-synchronous receiver with clock generator phase error correction","author":"agrawal","year":"2008","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2003.1240903"},{"key":"ref9","first-page":"84","article-title":"An 8 Gb\/s forwarded-clock I\/O receiver with up to 1 GHz constant jitter tracking bandwidth using a weak injection-locked oscillator in 0.13 $\\mu $ m CMOS","author":"chung","year":"2011","journal-title":"IEEE Int Symp VLSI Circuits Dig"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7274516\/06918524.pdf?arnumber=6918524","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T10:59:24Z","timestamp":1641985164000},"score":1,"resource":{"primary":{"URL":"https:\/\/ieeexplore.ieee.org\/document\/6918524"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,10]]},"references-count":17,"journal-issue":{"issue":"10"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2014.2355840","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,10]]}}}