{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:21:21Z","timestamp":1740133281145,"version":"3.37.3"},"reference-count":8,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2015,11,1]],"date-time":"2015-11-01T00:00:00Z","timestamp":1446336000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100000001","name":"National Science Foundation","doi-asserted-by":"publisher","award":["ECCS-1201877"],"award-info":[{"award-number":["ECCS-1201877"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/tvlsi.2014.2367311","type":"journal-article","created":{"date-parts":[[2014,11,20]],"date-time":"2014-11-20T20:46:37Z","timestamp":1416516397000},"page":"2743-2747","source":"Crossref","is-referenced-by-count":3,"title":["Optimizing the Use of STT-RAM in SSDs Through Data-Dependent Error Tolerance"],"prefix":"10.1109","volume":"23","author":[{"given":"Hao","family":"Wang","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Kai","family":"Zhao","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jiangpeng","family":"Li","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Tong","family":"Zhang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2012.6479129"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2012.2203589"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2013.2296136"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2010.2042041"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/GREENCOMP.2010.5598310"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TMAG.2008.2002386"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/IMW.2011.5873205"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IEDM.2008.4796680"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7302619\/06963372.pdf?arnumber=6963372","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:28:18Z","timestamp":1642004898000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6963372\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":8,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2014.2367311","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2015,11]]}}}