{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,4]],"date-time":"2026-06-04T12:41:38Z","timestamp":1780576898695,"version":"3.54.1"},"reference-count":22,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2015,11,1]],"date-time":"2015-11-01T00:00:00Z","timestamp":1446336000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology, Taiwan","doi-asserted-by":"publisher","award":["NSC-102-2221-E-194-063-MY3"],"award-info":[{"award-number":["NSC-102-2221-E-194-063-MY3"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2015,11]]},"DOI":"10.1109\/tvlsi.2014.2370631","type":"journal-article","created":{"date-parts":[[2014,11,26]],"date-time":"2014-11-26T20:55:30Z","timestamp":1417035330000},"page":"2487-2496","source":"Crossref","is-referenced-by-count":21,"title":["A Wide-Range Low-Cost All-Digital Duty-Cycle Corrector"],"prefix":"10.1109","volume":"23","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1398-4320","authenticated-orcid":false,"given":"Ching-Che","family":"Chung","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Duo","family":"Sheng","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Chang-Jun","family":"Li","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","first-page":"258","article-title":"All digital duty cycle correction circuit in 90 nm based on mutex","author":"swathi","year":"2009","journal-title":"Proc IEEE Comput Soc Annu Symp VLSI (ISVLSI)"},{"key":"ref11","doi-asserted-by":"crossref","first-page":"1524","DOI":"10.1109\/TVLSI.2011.2158011","article-title":"A 0.31–1 GHz fast-corrected duty-cycle corrector with successive approximation register for DDR DRAM applications","volume":"20","author":"min","year":"2012","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref12","first-page":"1","article-title":"A high-resolution all-digital duty-cycle corrector with a new pulse-width detector","author":"ke","year":"2010","journal-title":"Proc IEEE Int Conf Electron Devices Solid-State Circuits (EDSSC)"},{"key":"ref13","first-page":"460","article-title":"A low power wide tange duty cycle corrector based on pulse shrinking\/stretching mechanism","author":"chen","year":"2007","journal-title":"Proc IEEE Asian Solid-State Circuits Conf (ASSCC)"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2012.6341288"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2260186"},{"key":"ref16","first-page":"1","article-title":"A referenceless all-digital fast frequency acquisition full-rate CDR circuit for USB 2.0 in 65 nm CMOS technology","author":"chung","year":"2011","journal-title":"Proc Int Symp VLSI Design Autom Test (VLSI-DAT)"},{"key":"ref17","first-page":"267","article-title":"A high-resolution all-digital phase-locked loop with its application to built-in speed grading for memory","author":"hsu","year":"2008","journal-title":"Proc IEEE Int Symp VLSI Design Autom Test (VLSI-TSA-DAT)"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.807398"},{"key":"ref19","first-page":"1","article-title":"A low-power and small-area all-digital spread-spectrum clock generator in 65 nm CMOS technology","author":"chung","year":"2012","journal-title":"Proc Int Symp VLSI Design Autom Test (VLSI-DAT)"},{"key":"ref4","first-page":"ii-925","article-title":"An all-digital 50% duty-cycle corrector","author":"wang","year":"2004","journal-title":"Proc IEEE Int Symp Circuits Syst (ISCAS)"},{"key":"ref3","doi-asserted-by":"crossref","first-page":"760","DOI":"10.1109\/TVLSI.2011.2111424","article-title":"All-digital wide range precharge logic 50% duty cycle corrector","volume":"20","author":"gu","year":"2012","journal-title":"IEEE Trans Very Large Scale Integr (VLSI) Syst"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2021447"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2006.885396"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2011.6085073"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/EDSSC.2007.4450134"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914286"},{"key":"ref1","first-page":"257","article-title":"A programmable, multi-GHz, wide-range duty cycle correction circuit in 45 nm CMOS process","author":"mehta","year":"2012","journal-title":"Proc Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref9","first-page":"1","article-title":"A range extending delay-recycled clock skew-compensation and\/or duty-cycle-correction circuit","author":"wei","year":"2012","journal-title":"Proc IEEE Int Symp VLSI Design Autom Test (VLSI-TSA-DAT)"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.889381"},{"key":"ref22","first-page":"282","article-title":"A 0.1-to-1.5 GHz 4.2 mW all-digital DLL with dual duty-cycle correction circuit and update gear circuit for DRAM in 66 nm CMOS technology","author":"yun","year":"2008","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2182216"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7302619\/06967852.pdf?arnumber=6967852","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:28:18Z","timestamp":1642004898000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/6967852\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2015,11]]},"references-count":22,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2014.2370631","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2015,11]]}}}