{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2022,4,4]],"date-time":"2022-04-04T06:14:00Z","timestamp":1649052840830},"reference-count":12,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2016,1,1]],"date-time":"2016-01-01T00:00:00Z","timestamp":1451606400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"Incheon National University, Incheon, Korea, under the (New Faculty) Research Grant in 2014"},{"name":"IDEC, Daejeon, Korea"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2016,1]]},"DOI":"10.1109\/tvlsi.2015.2392092","type":"journal-article","created":{"date-parts":[[2015,2,13]],"date-time":"2015-02-13T19:50:28Z","timestamp":1423857028000},"page":"388-392","source":"Crossref","is-referenced-by-count":0,"title":["Defect Diagnosis via Segment Delay Learning"],"prefix":"10.1109","volume":"24","author":[{"given":"Jaeyong","family":"Chung","sequence":"first","affiliation":[]},{"given":"Woochul","family":"Kang","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.1992.227778"},{"key":"ref3","article-title":"Segment delay learning from quantized path delay measurements","author":"chung","year":"0","journal-title":"IEEE Trans Comput -Aided Design Integr Circuits Syst"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TEST.2000.894237"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISICir.2011.6131960"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/VTEST.2000.843863"},{"key":"ref5","first-page":"758","article-title":"A new path-oriented effect-cause methodology to diagnose delay failures","author":"hsu","year":"1998","journal-title":"Proc IEEE Int Test Conf (ITC)"},{"key":"ref12","first-page":"117","article-title":"Gate-delay fault diagnosis using the inject-and-evaluate paradigm","author":"wang","year":"2003","journal-title":"Proc Int Symp Defect and Fault Tolerance VLSI Syst (DFT)"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1145\/1837274.1837280"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2011.32"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ATS.2009.32"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4419-8297-1"},{"key":"ref1","first-page":"387","article-title":"Diagnosis framework for locating failed segments of path delay faults","author":"chen","year":"2005","journal-title":"Proc IEEE Int Test Conf (ITC)"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7365521\/7042341.pdf?arnumber=7042341","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T15:57:42Z","timestamp":1642003062000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7042341\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,1]]},"references-count":12,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2015.2392092","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,1]]}}}