{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T14:10:15Z","timestamp":1774966215148,"version":"3.50.1"},"reference-count":23,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"8","license":[{"start":{"date-parts":[[2016,8,1]],"date-time":"2016-08-01T00:00:00Z","timestamp":1470009600000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100004837","name":"Spanish Ministerio de Ciencia e Innovaci\u00f3n","doi-asserted-by":"publisher","award":["TEC2011-27916"],"award-info":[{"award-number":["TEC2011-27916"]}],"id":[{"id":"10.13039\/501100004837","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100004837","name":"Spanish Ministerio de Ciencia e Innovaci\u00f3n","doi-asserted-by":"publisher","award":["TEC2012-38558-C02-02"],"award-info":[{"award-number":["TEC2012-38558-C02-02"]}],"id":[{"id":"10.13039\/501100004837","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003359","name":"Generalitat Valenciana","doi-asserted-by":"publisher","award":["GV\/2014\/011"],"award-info":[{"award-number":["GV\/2014\/011"]}],"id":[{"id":"10.13039\/501100003359","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2016,8]]},"DOI":"10.1109\/tvlsi.2016.2514484","type":"journal-article","created":{"date-parts":[[2016,2,4]],"date-time":"2016-02-04T14:12:48Z","timestamp":1454595168000},"page":"2643-2653","source":"Crossref","is-referenced-by-count":28,"title":["Reduced-Complexity Nonbinary LDPC Decoder for High-Order Galois Fields Based on Trellis Min\u2013Max Algorithm"],"prefix":"10.1109","volume":"24","author":[{"given":"Jesus O.","family":"Lacruz","sequence":"first","affiliation":[]},{"given":"Francisco","family":"Garcia-Herrero","sequence":"additional","affiliation":[]},{"given":"Maria Jose","family":"Canet","sequence":"additional","affiliation":[]},{"given":"Javier","family":"Valls","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2354753"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2377194"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2493041"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2163889"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/TIT.1981.1056404"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2003.817545"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2015.7169065"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2009.06.070313"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ISWCS.2011.6125307"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2046196"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TSP.2013.2256905"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICC.2004.1312606"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/ISIT.2008.4595129"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2007.894088"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2013.6810404"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TCOMM.2013.050813.120489"},{"key":"ref2","first-page":"70","article-title":"Fast decoding algorithm for LDPC over GF $(2\\rm ^{q})$","author":"barnault","year":"2003","journal-title":"Proc IEEE Inf Theory Workshop"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/4234.681360"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2344113"},{"key":"ref20","doi-asserted-by":"crossref","first-page":"3430","DOI":"10.1109\/TCSI.2008.924892","article-title":"Algorithms of finding the first two minimum values and their hardware implementation","volume":"55","author":"wey","year":"2008","journal-title":"IEEE Trans Circuits Syst I Reg Papers"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2190668"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2362854"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2226920"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7519042\/07399426.pdf?arnumber=7399426","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:43:31Z","timestamp":1641987811000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7399426\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,8]]},"references-count":23,"journal-issue":{"issue":"8"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2514484","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,8]]}}}