{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,3,31]],"date-time":"2026-03-31T13:39:05Z","timestamp":1774964345261,"version":"3.50.1"},"reference-count":38,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2016,9,1]],"date-time":"2016-09-01T00:00:00Z","timestamp":1472688000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100007350","name":"Consejo Nacional de Ciencia y Tecnolog\u00eda, Mexico","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100007350","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Silicon Laboratories"},{"DOI":"10.13039\/100004361","name":"Texas Instruments, Inc","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100004361","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/tvlsi.2016.2527681","type":"journal-article","created":{"date-parts":[[2016,3,2]],"date-time":"2016-03-02T14:13:29Z","timestamp":1456928009000},"page":"2970-2982","source":"Crossref","is-referenced-by-count":70,"title":["A Capacitor-Less LDO With High-Frequency PSR Suitable for a Wide Range of On-Chip Capacitive Loads"],"prefix":"10.1109","volume":"24","author":[{"given":"Jorge","family":"Zarate-Roldan","sequence":"first","affiliation":[]},{"given":"Mengde","family":"Wang","sequence":"additional","affiliation":[]},{"given":"Joselyn","family":"Torres","sequence":"additional","affiliation":[]},{"given":"Edgar","family":"Sanchez-Sinencio","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2014.2314263"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/MCAS.2009.935695"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2004.1362447"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.1998.704211"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.900281"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.842831"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2020461"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1986.1052645"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/4.661206"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2022916"},{"key":"ref11","first-page":"1","article-title":"A 2 GHz-to-7.5 GHz quadrature clock-generator using digital delay locked loops for multi-standard I\/Os in 14 nm CMOS","author":"elshazly","year":"2014","journal-title":"Symp VLSI Circuits Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2039685"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2287282"},{"key":"ref14","first-page":"520","article-title":"A 5 mA $0.6~\\mu$ m CMOS Miller-compensated LDO regulator with ?27 dB worst-case power-supply rejection using 60 pF of on-chip capacitance","author":"gupta","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.862347"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2011.6055409"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2380644"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2289897"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2195061"},{"key":"ref28","first-page":"458","article-title":"A 10 b 205 MS\/s 1 mm $^{2}~90$ nm CMOS pipeline ADC for flat-panel display applications","author":"lee","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ISPSD.2012.6229025"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2031059"},{"key":"ref3","first-page":"333","article-title":"A 10 MHz ripple-based on-time controlled buck converter with dual ripple compensation and real-time efficiency optimization","author":"danzhu","year":"2012","journal-title":"Proc Eur Solid-State Circuits Conf (ESSCIRC)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1007\/b100747"},{"key":"ref29","doi-asserted-by":"crossref","first-page":"584","DOI":"10.1109\/JSSC.2005.843602","article-title":"Single Miller capacitor frequency compensation technique for low-power multistage amplifiers","volume":"40","author":"fan","year":"2005","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2346770"},{"key":"ref8","first-page":"1","article-title":"A 2.7–6.1 GHz CMOS local oscillator based on frequency multiplication by 3\/2","author":"bevilacqua","year":"2011","journal-title":"Proc NORCHIP"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/4.962289"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2015.2420572"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ESSCIRC.2014.6942090"},{"key":"ref1","year":"2013","journal-title":"LP3923 Cellular Phone Power Management Unit"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2300847"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2063990"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2346762"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2334831"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2177703"},{"key":"ref26","article-title":"Energy efficient RF transmitter design using enhanced breakdown voltage SOI-CMOS compatible MESFETs","author":"ghajar","year":"2012"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1007\/978-1-4020-8944-2_18"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7549121\/07423781.pdf?arnumber=7423781","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:43:12Z","timestamp":1641987792000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7423781\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":38,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2527681","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,9]]}}}