{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,1]],"date-time":"2026-06-01T23:18:27Z","timestamp":1780355907927,"version":"3.54.1"},"reference-count":53,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"9","license":[{"start":{"date-parts":[[2016,9,1]],"date-time":"2016-09-01T00:00:00Z","timestamp":1472688000000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/100006732","name":"Cyber Security Center, New York University","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100006732","id-type":"DOI","asserted-by":"publisher"}]},{"name":"CSC\u2013Abu Dhabi"},{"DOI":"10.13039\/100000001","name":"U.S. National Science Foundation","doi-asserted-by":"publisher","award":["1526405"],"award-info":[{"award-number":["1526405"]}],"id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/100000028","name":"Semiconductor Research Corporation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000028","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Mubadala Technology"},{"DOI":"10.13039\/100000001","name":"U.S. National Science Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/100000001","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2016,9]]},"DOI":"10.1109\/tvlsi.2016.2530092","type":"journal-article","created":{"date-parts":[[2016,4,11]],"date-time":"2016-04-11T14:07:36Z","timestamp":1460383656000},"page":"2946-2959","source":"Crossref","is-referenced-by-count":67,"title":["Building Trustworthy Systems Using Untrusted Components: A High-Level Synthesis Approach"],"prefix":"10.1109","volume":"24","author":[{"given":"Jeyavijayan JV","family":"Rajendran","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ozgur","family":"Sinanoglu","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Ramesh","family":"Karri","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref39","year":"2015","journal-title":"Cynthesizer and High-Level Design"},{"key":"ref38","year":"2015","journal-title":"AutoESL High-Level Synthesis Tool"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/TSE.1985.231893"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TETC.2014.2348182"},{"key":"ref31","first-page":"1","article-title":"Formal verification of taint-propagation security properties in a commercial SoC design","author":"subramanyan","year":"2014","journal-title":"Proc Design Autom Test Eur Conf Exhibit"},{"key":"ref30","year":"2014","journal-title":"JasperGold Security Path Verification App"},{"key":"ref37","year":"2015","journal-title":"Catapult C Synthesis"},{"key":"ref36","year":"2000","journal-title":"VSI Alliance&#x2014;IP Protection Development Working Group The Value and Management of Intellectual Assets"},{"key":"ref35","author":"johnson","year":"1989","journal-title":"Design and Analysis of Fault Tolerant Digital Systems"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/T-PAS.1975.31820"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2014.6881484"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2744769.2744823"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1145\/2742060.2742061"},{"key":"ref2","year":"2005","journal-title":"Defense Science Board (DSB) study on high performance microchip supply"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/IOLTS.2013.6604087"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1145\/2508859.2516654"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1145\/2660267.2660289"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2463209.2488808"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/VTS.2012.6231062"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/TIFS.2011.2160627"},{"key":"ref26","article-title":"Security verification of 3rd party intellectual property cores for information leakage","author":"rajendran","year":"2016","journal-title":"Proc IEEE Int l Symp VLSI Design"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691208"},{"key":"ref50","doi-asserted-by":"publisher","DOI":"10.1109\/EURDAC.1993.410610"},{"key":"ref51","doi-asserted-by":"publisher","DOI":"10.1109\/92.365450"},{"key":"ref53","doi-asserted-by":"publisher","DOI":"10.1145\/123186.123350"},{"key":"ref52","doi-asserted-by":"publisher","DOI":"10.1145\/37888.37920"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2009.5224968"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1145\/1629911.1630091"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2011.27"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1007\/978-3-642-04431-1_16"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/SP.2007.36"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513122"},{"key":"ref15","author":"villasenor","year":"2010","journal-title":"Scientific American"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2011.5954998"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/HST.2010.5513114"},{"key":"ref18","first-page":"48","article-title":"Coverage analysis techniques for HDL design validation","author":"jou","year":"1999","journal-title":"Proc Asia Pacific Conf Chip Design Language"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/DFT.2013.6653605"},{"key":"ref4","first-page":"15","article-title":"Detecting malicious inclusions in secure hardware: Challenges and solutions","author":"wang","year":"2008","journal-title":"Proc IEEE Int Workshop Hardw -Orient Secur Trust"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/MC.2010.299"},{"key":"ref6","first-page":"8","article-title":"At-speed delay characterization for IC authentication and Trojan horse detection","author":"li","year":"2008","journal-title":"Proc IEEE Int Workshop Hardw -Orient Secur Trust"},{"key":"ref5","first-page":"51","article-title":"Hardware Trojan detection using path delay fingerprint","author":"jin","year":"2008","journal-title":"Proc IEEE Int Workshop Hardw -Orient Secur Trust"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/HASE.2008.37"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/VLSI.Design.2009.22"},{"key":"ref49","doi-asserted-by":"publisher","DOI":"10.1109\/TR.1987.5222432"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2008.4484928"},{"key":"ref46","first-page":"493","article-title":"Design patterns for fault containment","author":"saridakis","year":"2003","journal-title":"Proc Eur Conf Pattern Lang Programs"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1145\/234215.234471"},{"key":"ref48","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228510"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/ISIE.2011.5984393"},{"key":"ref42","year":"2015","journal-title":"NYU&#x2014;Embedded Security Challenge"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2014.2334493"},{"key":"ref44","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1999.781030"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/FTCS.1993.627303"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7549121\/07450679.pdf?arnumber=7450679","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T11:43:12Z","timestamp":1641987792000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7450679\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2016,9]]},"references-count":53,"journal-issue":{"issue":"9"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2530092","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2016,9]]}}}