{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,8,4]],"date-time":"2026-08-04T22:07:58Z","timestamp":1785881278721,"version":"3.56.0"},"reference-count":29,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2017,1,1]],"date-time":"2017-01-01T00:00:00Z","timestamp":1483228800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100006115","name":"Institute for Research in Fundamental Sciences","doi-asserted-by":"publisher","award":["CS1395-2-03"],"award-info":[{"award-number":["CS1395-2-03"]}],"id":[{"id":"10.13039\/501100006115","id-type":"DOI","asserted-by":"publisher"}]},{"name":"Shahid Beheshti University"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,1]]},"DOI":"10.1109\/tvlsi.2016.2579667","type":"journal-article","created":{"date-parts":[[2016,7,14]],"date-time":"2016-07-14T20:35:43Z","timestamp":1468528543000},"page":"75-86","source":"Crossref","is-referenced-by-count":14,"title":["Sign-Magnitude Encoding for Efficient VLSI Realization of Decimal Multiplication"],"prefix":"10.1109","volume":"25","author":[{"given":"Saeid","family":"Gorgin","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8458-7627","authenticated-orcid":false,"given":"Ghassem","family":"Jaberipur","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2005.15"},{"key":"ref11","author":"richards","year":"1955","journal-title":"Arithmetic Operations in Digital Computers"},{"key":"ref12","year":"2008"},{"key":"ref13","doi-asserted-by":"crossref","first-page":"212","DOI":"10.1109\/T-C.1969.222633","article-title":"decimal adder with signed digit arithmetic","volume":"c 18","author":"svoboda","year":"1969","journal-title":"IEEE Transactions on Computers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2007.4601916"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2008.5074737"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2008.218"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2009.28"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ReConFig.2009.34"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/FPT.2010.5681767"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2013.160"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2315626"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2008.4542181"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2004.1347893"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.167"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2009.23"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/T-C.1971.223362"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt:20060160"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.35"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/ACSSC.2006.354758"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ICED.2008.4786744"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/ARITH.2003.1207666"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/ASAP.2003.1212858"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2009.110"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2009.07.002"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1049\/iet-cdt.2011.0059"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1049\/ip-e.1989.0021"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/TC.1973.5009159"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/92.386228"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7797597\/07513404.pdf?arnumber=7513404","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:12:14Z","timestamp":1642003934000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7513404\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,1]]},"references-count":29,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2579667","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,1]]}}}