{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,6,5]],"date-time":"2026-06-05T15:54:27Z","timestamp":1780674867505,"version":"3.54.1"},"reference-count":21,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2017,2,1]],"date-time":"2017-02-01T00:00:00Z","timestamp":1485907200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100003968","name":"Iran National Science Foundation","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003968","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/tvlsi.2016.2587696","type":"journal-article","created":{"date-parts":[[2016,7,20]],"date-time":"2016-07-20T18:22:46Z","timestamp":1469038966000},"page":"393-401","source":"Crossref","is-referenced-by-count":177,"title":["RoBA Multiplier: A Rounding-Based Approximate Multiplier for High-Speed yet Energy-Efficient Digital Signal Processing"],"prefix":"10.1109","volume":"25","author":[{"given":"Reza","family":"Zendegani","sequence":"first","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Mehdi","family":"Kamal","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Milad","family":"Bahadori","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8614-2007","authenticated-orcid":false,"given":"Ali","family":"Afzali-Kusha","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]},{"given":"Massoud","family":"Pedram","sequence":"additional","affiliation":[],"role":[{"vocabulary":"crossref","role":"author"}]}],"member":"263","reference":[{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ReCoSoC.2013.6581532"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783335"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TEC.1962.5219391"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2006.198"},{"key":"ref14","year":"2010","journal-title":"Nangate 45nm open cell library"},{"key":"ref15","author":"myler","year":"2009","journal-title":"The pocket handbook of image processing algorithms in C"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2014.2333366"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2015.7372600"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657022"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1145\/2228360.2228509"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2011.6105401"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2009.2027626"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2011.51"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/CADS.2013.6714233"},{"key":"ref8","first-page":"1","article-title":"Low-power high-speed multiplier for error-tolerant application","author":"kyaw","year":"2010","journal-title":"Proc IEEE Int Conf Electron Devices Solid-State Circuits (EDSSC)"},{"key":"ref7","first-page":"97","article-title":"Approximate signed binary integer multipliers for arithmetic data value speculation","author":"kelly","year":"2009","journal-title":"Proc Conf Design Arch for Signal Image Process"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TCAD.2012.2217962"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2011.2177004"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2014.2308214"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TIP.2003.819861"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/TC.2012.146"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7827022\/07517375.pdf?arnumber=7517375","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:20:17Z","timestamp":1642004417000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7517375\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":21,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2587696","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,2]]}}}