{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:21:38Z","timestamp":1740133298068,"version":"3.37.3"},"reference-count":10,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"2","license":[{"start":{"date-parts":[[2017,2,1]],"date-time":"2017-02-01T00:00:00Z","timestamp":1485907200000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100004663","name":"Ministry of Science and Technology, Taiwan","doi-asserted-by":"publisher","award":["MOST 103-2221-E-009-199-MY3","MOST 104-2220-E-009-022"],"award-info":[{"award-number":["MOST 103-2221-E-009-199-MY3","MOST 104-2220-E-009-022"]}],"id":[{"id":"10.13039\/501100004663","id-type":"DOI","asserted-by":"publisher"}]},{"name":"MoE ATU Program under NCTU Biomedical Electronics Translational Research Center"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,2]]},"DOI":"10.1109\/tvlsi.2016.2592537","type":"journal-article","created":{"date-parts":[[2016,8,1]],"date-time":"2016-08-01T18:09:17Z","timestamp":1470074957000},"page":"783-787","source":"Crossref","is-referenced-by-count":3,"title":["Digital Buck Converter With Switching Loss Reduction Scheme for Light Load Efficiency Enhancement"],"prefix":"10.1109","volume":"25","author":[{"given":"Chung-Shiang","family":"Wu","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hui-Hsuan","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-9111-2822","authenticated-orcid":false,"given":"Po-Hung","family":"Chen","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Wei","family":"Hwang","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2339325"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2004.836353"},{"key":"ref10","first-page":"64","article-title":"Minimum energy tracking loop with embedded DC-DC converter delivering voltages down to 250 mV in 65 nm CMOS","author":"ramadass","year":"2007","journal-title":"IEEE Int Solid-State Circuits Conf Dig Tech Papers (ISSCC)"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.907175"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/PESC.2005.1581930"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2159054"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2108910"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/TPEL.2015.2420572"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/VLSIC.2012.6243856"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2162914"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7827022\/07527660.pdf?arnumber=7527660","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:20:16Z","timestamp":1642004416000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7527660\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,2]]},"references-count":10,"journal-issue":{"issue":"2"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2592537","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2017,2]]}}}