{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2025,2,21]],"date-time":"2025-02-21T10:21:39Z","timestamp":1740133299870,"version":"3.37.3"},"reference-count":47,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2017,3,1]],"date-time":"2017-03-01T00:00:00Z","timestamp":1488326400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,3]]},"DOI":"10.1109\/tvlsi.2016.2606579","type":"journal-article","created":{"date-parts":[[2016,9,21]],"date-time":"2016-09-21T18:11:29Z","timestamp":1474481489000},"page":"1012-1022","source":"Crossref","is-referenced-by-count":10,"title":["Bias Temperature Instability Mitigation via Adaptive Cache Size Management"],"prefix":"10.1109","volume":"25","author":[{"given":"Nezam","family":"Rohbani","sequence":"first","affiliation":[]},{"given":"Mojtaba","family":"Ebrahimi","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4347-4380","authenticated-orcid":false,"given":"Seyed-Ghassem","family":"Miremadi","sequence":"additional","affiliation":[]},{"given":"Mehdi B.","family":"Tahoori","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref39","first-page":"399","article-title":"NBTI tolerant microarchitecture design in the presence of process variation","author":"fu","year":"2008","journal-title":"Proc 41st Annu IEEE\/ACM Int Symp Microarchitecture"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1504\/IJHPSA.2010.034542"},{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2006.73"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/DATE.2011.5763152"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/VLSID.2007.129"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/LPE.2000.155259"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1145\/2491477.2491482"},{"article-title":"Improving the reliability of microprocessors under BTI and TDDB degradations","year":"2014","author":"li","key":"ref36"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1145\/1394608.1382151"},{"key":"ref34","doi-asserted-by":"publisher","DOI":"10.1109\/ISQED.2014.6783303"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ETS.2015.7138775"},{"key":"ref40","doi-asserted-by":"publisher","DOI":"10.1007\/978-94-007-7663-0_2"},{"key":"ref11","first-page":"1","article-title":"Aging-aware standard cell library design","author":"kiamehr","year":"2014","journal-title":"Proc Conf Design Autom Test Eur"},{"journal-title":"Bias Temperature Instability for Devices and Circuits","year":"2013","author":"grasser","key":"ref12"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1145\/2755558"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/ICCAD.2013.6691098"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/DSN.2013.6575315"},{"key":"ref16","first-page":"1","article-title":"Bias temperature instability analysis of FinFET based SRAM cells","author":"khan","year":"2014","journal-title":"Proc Design Autom Test Eur Conf Exhibit"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/CODES-ISSS.2013.6659017"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2278549"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2009.03.016"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2013.6657031"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2010.2067810"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1145\/2333660.2333696"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1145\/2429384.2429431"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/DAC.2007.375188"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.1999.809463"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1147\/rd.504.0433"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1016\/j.microrel.2012.03.012"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2010.2049038"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2011.2135630"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.7873\/DATE.2013.342"},{"key":"ref1","first-page":"161","article-title":"ITRS: The international technology roadmap for semiconductors","author":"hoefflinger","year":"2012","journal-title":"Chips 2020 A Guide to the Future of Nanoelectronics"},{"key":"ref46","doi-asserted-by":"publisher","DOI":"10.1109\/ICSICT.2010.5667399"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TNS.2010.2084100"},{"key":"ref45","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.1987.1052809"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/ASQED.2010.5548256"},{"key":"ref47","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2006.876103"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1145\/2483028.2483096"},{"key":"ref42","doi-asserted-by":"publisher","DOI":"10.1109\/ISLPED.2011.5993626"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/MICRO.2007.11"},{"key":"ref41","doi-asserted-by":"publisher","DOI":"10.1145\/1531542.1531618"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.2015.7059010"},{"key":"ref44","doi-asserted-by":"crossref","first-page":"1","DOI":"10.1145\/2024716.2024718","article-title":"The gem5 simulator","volume":"39","author":"binkert","year":"2011","journal-title":"ACM SIGARCH Comput Archit News"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2006.320885"},{"key":"ref43","doi-asserted-by":"publisher","DOI":"10.1109\/MWSCAS.2014.6908568"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2011.2109973"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7862316\/07572908.pdf?arnumber=7572908","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:12:04Z","timestamp":1642003924000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7572908\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,3]]},"references-count":47,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2606579","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2017,3]]}}}