{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,1,2]],"date-time":"2026-01-02T07:37:33Z","timestamp":1767339453426,"version":"3.37.3"},"reference-count":33,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"3","license":[{"start":{"date-parts":[[2017,3,1]],"date-time":"2017-03-01T00:00:00Z","timestamp":1488326400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"name":"National Science and Technology Major Projects of China","award":["2012ZX03004007"],"award-info":[{"award-number":["2012ZX03004007"]}]},{"DOI":"10.13039\/501100001809","name":"National Natural Science Foundation of China","doi-asserted-by":"publisher","award":["61222405"],"award-info":[{"award-number":["61222405"]}],"id":[{"id":"10.13039\/501100001809","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,3]]},"DOI":"10.1109\/tvlsi.2016.2611518","type":"journal-article","created":{"date-parts":[[2016,10,4]],"date-time":"2016-10-04T19:03:56Z","timestamp":1475607836000},"page":"872-880","source":"Crossref","is-referenced-by-count":16,"title":["A Flexible Continuous-Time $\\Delta \\Sigma $ ADC With Programmable Bandwidth Supporting Low-Pass and Complex Bandpass Architectures"],"prefix":"10.1109","volume":"25","author":[{"ORCID":"https:\/\/orcid.org\/0000-0003-1792-5985","authenticated-orcid":false,"given":"Yang","family":"Xu","sequence":"first","affiliation":[]},{"given":"Xinwang","family":"Zhang","sequence":"additional","affiliation":[]},{"given":"Zhihua","family":"Wang","sequence":"additional","affiliation":[]},{"ORCID":"https:\/\/orcid.org\/0000-0003-4399-4423","authenticated-orcid":false,"given":"Baoyong","family":"Chi","sequence":"additional","affiliation":[]}],"member":"263","reference":[{"key":"ref33","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2099893"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2015.2394365"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/4.972135"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1007\/s10470-013-0073-3"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2185310"},{"key":"ref11","first-page":"308","article-title":"A 90 nm CMOS single-chip GPS receiver with 5 dBm out-of-band IIP3 2.0 dB NF","author":"sahu","year":"2005","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2005.862346"},{"key":"ref13","first-page":"240","article-title":"A $0.13~\\mu $ m CMOS EDGE\/UMTS\/WLAN tri-mode $\\Delta \\Sigma $ ADC with ?92 dB THD","author":"christen","year":"2007","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2028053"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2046230"},{"key":"ref16","first-page":"153","article-title":"A 2.8-to-8.5 mW GSM\/Bluetooth\/UMTS\/DVB-H\/WLAN fully reconfigurable CT $\\Delta \\Sigma $ with 200 kHz to 20 MHz BW for 4G radios in 90 nm digital CMOS","author":"ke","year":"2010","journal-title":"Proc IEEE Symp VLSI Circuits"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2164026"},{"key":"ref18","first-page":"393","article-title":"A 5\/20 MHz-BW 4.2\/8.1 mW CT QBP $\\Sigma \\Delta $ modulator with digital I\/Q calibration for GNSS receivers","author":"zhang","year":"2013","journal-title":"Proc IEEE A-SSCC"},{"key":"ref19","first-page":"245","article-title":"A 7.5 mW 9 MHz CT $\\Delta \\Sigma $ modulator in 65 nm CMOS with 69 dB SNDR and reduced sensitivity to loop delay variations","author":"andersson","year":"2012","journal-title":"Proc IEEE A-SSCC"},{"key":"ref28","doi-asserted-by":"crossref","first-page":"1501","DOI":"10.1109\/JSSC.2007.899103","article-title":"Flexible baseband analog circuits for software-defined radio front-ends","volume":"42","author":"craninckx","year":"2007","journal-title":"IEEE J Solid-State Circuits"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2011.2144110"},{"key":"ref27","first-page":"313","article-title":"Dual-mode 10 MHz BW 4.8\/6.3 mW reconfigurable lowpass\/complex bandpass CT $\\Sigma \\Delta $ modulator with 65.8\/74.2 dB DR for a zero\/low-IF SDR receiver","author":"xu","year":"2014","journal-title":"Proc IEEE RFIC"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2075210"},{"key":"ref6","first-page":"422","article-title":"A 7.2 mW quadrature GPS receiver in $0.13~\\mu $ m CMOS","author":"cheng","year":"2009","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.880616"},{"key":"ref5","first-page":"292","article-title":"A 900 MHz dual conversion low-IF GSM receiver in $0.35~\\mu $ m CMOS","author":"tadjpour","year":"2001","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref8","first-page":"1","article-title":"A dual-channel GPS\/Compass\/Galileo\/GLONASS reconfigurable GNSS receiver in 65 nm CMOS","author":"qi","year":"2011","journal-title":"Proc IEEE CICC"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2039827"},{"key":"ref2","first-page":"408","article-title":"A 2 mm20.1-to-5 GHz SDR receiver in 45 nm digital CMOS","author":"giannini","year":"2009","journal-title":"IEEE ISSCC Dig Tech Papers"},{"key":"ref9","first-page":"249","article-title":"A 0.1&#x2013;5GHz flexible SDR receiver in 65 nm CMOS","author":"zhang","year":"2014","journal-title":"Proc IEEE A-SSCC"},{"journal-title":"LTE Advanced 3GPP Release 10 and beyond","year":"2009","author":"nakamura","key":"ref1"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2012.2221194"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884340"},{"key":"ref21","first-page":"1","article-title":"A 10-MHz bandwidth 70-dB SNDR 640 MS\/s continuous-time $\\Sigma \\Delta $ ADC using Gm-C filter with nonlinear feedback DAC calibration","author":"huang","year":"2013","journal-title":"Proc IEEE CICC"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2291713"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2048505"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2002.804332"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.884332"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/7862316\/07582541.pdf?arnumber=7582541","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:12:05Z","timestamp":1642003925000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/7582541\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,3]]},"references-count":33,"journal-issue":{"issue":"3"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2016.2611518","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"type":"print","value":"1063-8210"},{"type":"electronic","value":"1557-9999"}],"subject":[],"published":{"date-parts":[[2017,3]]}}}