{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,2,20]],"date-time":"2026-02-20T18:16:52Z","timestamp":1771611412791,"version":"3.50.1"},"reference-count":31,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"11","license":[{"start":{"date-parts":[[2017,11,1]],"date-time":"2017-11-01T00:00:00Z","timestamp":1509494400000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100003725","name":"Basic Science Research Program through the National Research Foundation of Korea (NRF)","doi-asserted-by":"publisher","id":[{"id":"10.13039\/501100003725","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003621","name":"Ministry of Science, ICT and Future Planning","doi-asserted-by":"publisher","award":["NRF 2015R1A1A1A05027276"],"award-info":[{"award-number":["NRF 2015R1A1A1A05027276"]}],"id":[{"id":"10.13039\/501100003621","id-type":"DOI","asserted-by":"publisher"}]},{"DOI":"10.13039\/501100003052","name":"Industrial Technology Innovation Program of the Ministry of Trade, Industry and Energy","doi-asserted-by":"publisher","award":["10080611"],"award-info":[{"award-number":["10080611"]}],"id":[{"id":"10.13039\/501100003052","id-type":"DOI","asserted-by":"publisher"}]}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2017,11]]},"DOI":"10.1109\/tvlsi.2017.2742603","type":"journal-article","created":{"date-parts":[[2017,9,7]],"date-time":"2017-09-07T19:34:08Z","timestamp":1504812848000},"page":"3006-3018","source":"Crossref","is-referenced-by-count":29,"title":["An External Capacitor-Less Ultralow-Dropout Regulator Using a Loop-Gain Stabilizing Technique for High Power-Supply Rejection Over a Wide Range of Load Current"],"prefix":"10.1109","volume":"25","author":[{"given":"Younghyun","family":"Lim","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Jeonghyun","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Yongsun","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Seong-Sik","family":"Song","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Hong-Teuk","family":"Kim","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0001-8244-5115","authenticated-orcid":false,"given":"Ockgoo","family":"Lee","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0002-3055-8684","authenticated-orcid":false,"given":"Jaehyouk","family":"Choi","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2053859"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2185306"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2380644"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2334831"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2007.902615"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2003.817256"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2006.891496"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2010.2046204"},{"key":"ref16","first-page":"584","article-title":"A 65 nm sub-1 V multi-stage low-dropout (LDO) regulator design for SoC systems","author":"lee","year":"2010","journal-title":"Proc IEEE 53rd Int Midwest Symp Circuits Syst (MWSCAS)"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2012.2215392"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2014.2346762"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2015.2512702"},{"key":"ref28","doi-asserted-by":"publisher","DOI":"10.1109\/SOCC.2004.1362447"},{"key":"ref4","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2265499"},{"key":"ref27","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.914266"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.900281"},{"key":"ref6","first-page":"1","article-title":"A 140 mA 90 nm CMOS low drop-out regulator with ?56 dB power supply rejection at 10 MHz","author":"amer","year":"2010","journal-title":"Proc IEEE Custom Integr Circuits Conf"},{"key":"ref29","first-page":"361","article-title":"Stability and frequency compensation","author":"razavi","year":"2001","journal-title":"Design of Analog CMOS Integrated Circuits"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2010.2072611"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2287282"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2039685"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1109\/4.654935"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2016.2527681"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2007.900284"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2012.2195061"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2013.2289897"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1109\/CICC.2011.6055409"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1109\/TCSI.2014.2309902"},{"key":"ref23","doi-asserted-by":"publisher","DOI":"10.1109\/JSSC.2009.2034805"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/4.52187"},{"key":"ref25","first-page":"1","article-title":"An extemal-capacitor-less low-dropout regulator with less than ?36 dB PSRR at all frequencies from 10 kHz to 1 GHz using an adaptive supply-ripple cancellation technique to the body-gate","author":"lim","year":"2017","journal-title":"Proc IEEE Custom Integr Circuits Conf"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8079089\/08027201.pdf?arnumber=8027201","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:22:23Z","timestamp":1642004543000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8027201\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2017,11]]},"references-count":31,"journal-issue":{"issue":"11"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2742603","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2017,11]]}}}