{"status":"ok","message-type":"work","message-version":"1.0.0","message":{"indexed":{"date-parts":[[2026,5,19]],"date-time":"2026-05-19T19:17:40Z","timestamp":1779218260097,"version":"3.51.4"},"reference-count":39,"publisher":"Institute of Electrical and Electronics Engineers (IEEE)","issue":"1","license":[{"start":{"date-parts":[[2018,1,1]],"date-time":"2018-01-01T00:00:00Z","timestamp":1514764800000},"content-version":"vor","delay-in-days":0,"URL":"https:\/\/ieeexplore.ieee.org\/Xplorehelp\/downloads\/license-information\/IEEE.html"}],"funder":[{"DOI":"10.13039\/501100009928","name":"Higher Committee for Education Development in Iraq","doi-asserted-by":"crossref","id":[{"id":"10.13039\/501100009928","id-type":"DOI","asserted-by":"crossref"}]},{"name":"PSU ECE Department"}],"content-domain":{"domain":[],"crossmark-restriction":false},"short-container-title":["IEEE Trans. VLSI Syst."],"published-print":{"date-parts":[[2018,1]]},"DOI":"10.1109\/tvlsi.2017.2750074","type":"journal-article","created":{"date-parts":[[2017,9,21]],"date-time":"2017-09-21T18:13:14Z","timestamp":1506017594000},"page":"23-36","source":"Crossref","is-referenced-by-count":12,"title":["A Time-Efficient CMOS-Memristive Programmable Circuit Realizing Logic Functions in Generalized AND\u2013XOR Structures"],"prefix":"10.1109","volume":"26","author":[{"ORCID":"https:\/\/orcid.org\/0000-0001-7336-4444","authenticated-orcid":false,"given":"Muayad J.","family":"Aljafar","sequence":"first","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Marek A.","family":"Perkowski","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"ORCID":"https:\/\/orcid.org\/0000-0003-0995-2334","authenticated-orcid":false,"given":"John M.","family":"Acken","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]},{"given":"Robin","family":"Tan","sequence":"additional","affiliation":[],"role":[{"role":"author","vocabulary":"crossref"}]}],"member":"263","reference":[{"key":"ref39","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2017.2690571"},{"key":"ref38","doi-asserted-by":"publisher","DOI":"10.1109\/ICCD.2015.7357122"},{"key":"ref33","doi-asserted-by":"crossref","first-page":"115","DOI":"10.1109\/TNANO.2013.2241075","article-title":"Programmable CMOS\/memristor threshold logic","volume":"12","author":"ligang","year":"2013","journal-title":"IEEE Trans Nanotechnol"},{"key":"ref32","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2012.2232946"},{"key":"ref31","doi-asserted-by":"publisher","DOI":"10.1109\/LED.2011.2127439"},{"key":"ref30","doi-asserted-by":"publisher","DOI":"10.1049\/el.2011.3270"},{"key":"ref37","doi-asserted-by":"publisher","DOI":"10.1109\/JETCAS.2015.2435531"},{"key":"ref36","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1963.263420"},{"key":"ref35","doi-asserted-by":"publisher","DOI":"10.1109\/NanoArch.2013.6623028"},{"key":"ref34","first-page":"1","article-title":"MRL—Memristor ratioed logic","author":"kvatinsky","year":"2012","journal-title":"Proc 13th Int Workshop Cellular Nanoscale Netw Appl"},{"key":"ref10","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1998.669404"},{"key":"ref11","doi-asserted-by":"publisher","DOI":"10.1109\/ISCAS.2012.6271792"},{"key":"ref12","doi-asserted-by":"publisher","DOI":"10.1109\/JPROC.2010.2070830"},{"key":"ref13","doi-asserted-by":"publisher","DOI":"10.1063\/1.3294625"},{"key":"ref14","doi-asserted-by":"publisher","DOI":"10.1021\/nl203687n"},{"key":"ref15","doi-asserted-by":"publisher","DOI":"10.1021\/acs.nanolett.6b01781"},{"key":"ref16","doi-asserted-by":"publisher","DOI":"10.1007\/s12668-016-0213-1"},{"key":"ref17","doi-asserted-by":"publisher","DOI":"10.1145\/1084748.1084750"},{"key":"ref18","doi-asserted-by":"publisher","DOI":"10.1073\/pnas.0806642106"},{"key":"ref19","doi-asserted-by":"publisher","DOI":"10.1021\/nl8037689"},{"key":"ref28","author":"weste","year":"1985","journal-title":"Principles of CMOS VLSI Design"},{"key":"ref4","article-title":"Material implication: Digital logic with memristors","author":"kuekes","year":"0"},{"key":"ref27","author":"muroga","year":"1979","journal-title":"Logic Design and Switching Theory"},{"key":"ref3","doi-asserted-by":"publisher","DOI":"10.1038\/nature08940"},{"key":"ref6","doi-asserted-by":"publisher","DOI":"10.1109\/CNNA.2012.6331438"},{"key":"ref29","doi-asserted-by":"publisher","DOI":"10.1109\/TVLSI.2013.2282132"},{"key":"ref5","doi-asserted-by":"publisher","DOI":"10.1109\/TCSII.2011.2158253"},{"key":"ref8","doi-asserted-by":"publisher","DOI":"10.1109\/PGEC.1967.264603"},{"key":"ref7","doi-asserted-by":"publisher","DOI":"10.1109\/TNANO.2016.2570248"},{"key":"ref2","doi-asserted-by":"publisher","DOI":"10.1038\/nature06932"},{"key":"ref9","doi-asserted-by":"publisher","DOI":"10.1109\/ASPDAC.1997.600332"},{"key":"ref1","doi-asserted-by":"publisher","DOI":"10.1109\/TCT.1971.1083337"},{"key":"ref20","doi-asserted-by":"publisher","DOI":"10.1088\/0034-4885\/75\/7\/076502"},{"key":"ref22","doi-asserted-by":"publisher","DOI":"10.1016\/j.vlsi.2016.02.002"},{"key":"ref21","doi-asserted-by":"publisher","DOI":"10.1016\/j.mejo.2014.09.005"},{"key":"ref24","doi-asserted-by":"publisher","DOI":"10.1088\/0957-4484\/22\/48\/485203"},{"key":"ref23","doi-asserted-by":"crossref","first-page":"625","DOI":"10.1038\/nmat3070","article-title":"A fast, high-endurance and scalable non-volatile memory device made from asymmetric Ta2O5–x\/TaO2–x bilayer structures","volume":"10","author":"lee","year":"2011","journal-title":"Nature Mater"},{"key":"ref26","doi-asserted-by":"publisher","DOI":"10.1109\/12.45212"},{"key":"ref25","doi-asserted-by":"publisher","DOI":"10.1109\/43.277608"}],"container-title":["IEEE Transactions on Very Large Scale Integration (VLSI) Systems"],"original-title":[],"link":[{"URL":"http:\/\/xplorestaging.ieee.org\/ielx7\/92\/8240812\/08048040.pdf?arnumber=8048040","content-type":"unspecified","content-version":"vor","intended-application":"similarity-checking"}],"deposited":{"date-parts":[[2022,1,12]],"date-time":"2022-01-12T16:24:44Z","timestamp":1642004684000},"score":1,"resource":{"primary":{"URL":"http:\/\/ieeexplore.ieee.org\/document\/8048040\/"}},"subtitle":[],"short-title":[],"issued":{"date-parts":[[2018,1]]},"references-count":39,"journal-issue":{"issue":"1"},"URL":"https:\/\/doi.org\/10.1109\/tvlsi.2017.2750074","relation":{},"ISSN":["1063-8210","1557-9999"],"issn-type":[{"value":"1063-8210","type":"print"},{"value":"1557-9999","type":"electronic"}],"subject":[],"published":{"date-parts":[[2018,1]]}}}